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To meet the common demands of the heterodyne signal process system, a phase measurement system based on dual-differential phase discrimination is studied and applied. With the frequency range of 5kHz-50kHz, this system has sampling rate of 10/sec, stability of ±0.0036°, maximum error of ±0.06°, and it can measure the zero point of phase angle.

围绕高精度外差信号处理系统的一般要求,研究和实现了基于双向差动鉴相的相位测量系统,在5kHz-50kHz的范围内、采样速率10次/秒时,示值稳定性优于±0.0036°,最大误差小于±0.06°,可以测量零相位。

To reduce the error between the interpolation function regaining the sampled signal and interpolation function ha by Shannon sampling theorem, this paper suggests that the common linear interpolation is replaced by a second order approximation of the parabolic interpolation.

为减小恢复被采信号所用的内插函数与山农采样定理要求的内插函数ha之间的误差,提出了用抛物线内插--ha的二阶近似代替常规的线性内插。

In the system, a finepositioning window signal generating circuit redundant, sample and hold circuit of positioning error signal using no traditional charge/discharge method but high-speed switches and operational amplifier integrators, and cross-zero detector with threshold for higher reliability, is originated by the author in this paper.

综合面伺服和扇区伺服的各自优点,设计完成了4000 TPI光刻伺服解调系统:在设计中,首创了带冗余的精定位窗口信号生成电路,采用高速模拟开关和运放积分电路代替传统的电容充放电法,以完成精定位位置误差信号的平均与采样保持,使用带阈值的过零检测电路提高过道脉冲的可靠性。

Considering the speed , power dissipation and specifications, A flip-around sample and hold circuit was designed to reduce the power consumption; S/H circuit is followed by eight 1.5-bit stages and a final 2-bit flash sub-ADC.

该流水线式ADC的采样保持电路采用Flip-around结构以减少功耗;前8级每级1.5位,最后一级为2位的并行flash ADC,并采用数字校正技术对级电路的误差进行校正,最终以达到10位的精度;为了达到系统低功耗的要求,该流水线ADC采用了运放共享技术和逐级缩小技术。

This makes the feasibility of mechanical tele-control through Internet. For the distortion of information caused by uncertain net delay and treatment of sampling information treater, the static error is induced.

但是由于网络传输环节的不确定性时延和采样信息处理器的数据报使用策略使传输后的控制信号发生变形,从而使系统存在稳态误差。

A certain truncation error with higher sampling ferquency and/or smaller control horizon can be used to get high performance of control.

改进后的DMC允许模型向量存在一定的截断误差,从而能以较小的建模时域或较高的采样频率实现高性能的DMC。

Further improvements can be obtained by properly distributing different weighted coefficients aq on sampling points both for the pass band and stop band.

通过为每一个频率采样点设置一个权重系数,并根据计算出的,判断在通带和阻带内哪个取样点的误差最大,适当地调整权重系数,我们就发展出了基于RBF的FIR滤波器优化设计算法。

The high vertical resolution is achieved at a larger sampling distance when interpolation algorithm is adopted to reconstruct the 3D profile and the conicoid fitting technique is used to calibrate for the system error in the data processing.

在数据处理上,采用了内插值三维重构算法,以及二次曲面拟合的系统误差校正算法,可以在较大的采样间距下获取较高的测量精度。

Computer simulation result proves that A. C. parameters measurement of static signals using Harr wavelet transform could get the accurate result by the ideal sampling situation, i. e. the synchronous error is zero. Compare with synchronous and quasi-synchronous sampling algorithm, A. C. parameters measurement of transient signals using Harr wavelet transform could get more accurate result.

对谐波相位测量方法进行了误差分析,通过仿真证明,在稳态信号情况下,如果采样过程不存在同步偏差,利用Harr小波变换的方法可以对交流电量参数进行准确的测量;在暂态信号情况下,该方法与同步、准同步算法相比,可以达到很高的测量准确度。

The study show that symbol timing offset and sampling frequency offset would introduce inter-symbol interference, frequency offset of carriers would result in intercarrier interference.

然后,就同步误差对系统性能的影响进行了详细分析讨论,分析表明,定时偏差和采样频率偏差将会引入码间干扰,载波频率偏差导致载波间干扰的发生。

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