通道

The unit connects to the elevator channel, aileron channel, and an auxiliary channel.

单位连接到电梯通道，副翼通道和辅助通道。

The data of the pre and post reconstruction of microwave time comparison system is collected and processed. The performance of one-way time transfer of previous system, the digital channel and the analog channel of the reconstructed system are analyzed, and the performance of two-way time comparison of the analog channel and the performance of GPS CV time comparison are analyzed too.

对改造前后的微波时间比对系统和GPS共视比对系统进行数据采集、处理，分析了改造前微波时间比对系统的单向时间传递性能，改造后的数字微波时间比对系统数字通道和模拟通道的单向时间传递性能，模拟通道的双向时间比对性能及GPS共视系统的时间比对性能。

Objectives and methods: The present study is undertaken to examine our hypothesis that with the accumulation of ion channels, increased sialic acids at the injury site or DRG somata result in a reduction of net transmembrane potential that evoke ESD in injured neurons.

膜蛋白的一个共同特性是其膜外域接受密集的糖基化，糖基含有大量带负电的唾液酸，如大部分离子通道，特别是电压依赖性的钠通道含有大量的唾液酸，而且这些负电荷靠近钠通道的电压感受器而易化通道开放。

SMD-MC34119 Pinout: C Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel C Double PWM Generation, Capture/Waveform Mode, Up/Down Capability One Four-channel 16-bit PWM Controller One Two-wire Interface C Master Mode Support Only, All Two-wire Atmel EEPROMs Supported One 8-channel 10-bit Analog-to-Digital Converter, Four Channels Multiplexed with Digital I/Os IEEE 1149.1 JTAG Boundary Scan on All Digital Pins 5V-tolerant I/Os, including Four High-current Drive I/O lines, Up to 16 mA Each Power Supplies C Embedded 1.8V Regulator, Drawing up to 100 mA for the Core and External Components C 3.3V VDDIO I/O Lines Power Supply, Independent 3.3V VDDFLASH Flash Power Supply C 1.8V VDDCORE Core Power Supply with Brownout Detector Fully Static Operation: Up to 55 MHz at 1.65V and 85C Worst Case Conditions Available in a 64-lead LQFP Package

SMD-MC34119引脚说明： C款三输入外部时钟，两个多用途I / O引脚每通道双PWM生成，捕获/波形模式，上/下能力的一个四通道16位PWM控制器一两线接口C中间模式支持，只有在所有两线Atmel公司的EEPROM支持的一个8通道10位模拟数字转换器，四通道复用数字I / O的IEEE 1149.1 JTAG边界扫描所有数字引脚5V容限I / O口，其中包括4大电流驱动I / O线，最多一六毫安C镶嵌每个电源1.8V的稳压器，绘图高达100的核心和外部元件 3.3 VDDIO毫安I / O的电源线，独立电源3.3V的VDDFLASH闪光 1.8 VDDCORE核心电源掉电检测与全静态工作：高达55兆赫和85℃时为1.65V最恶劣条件下以64引脚LQFP封装

It's a 19 rack-mount 4U mixer featuring 4 stereo dual-input channels, 2 mono mic/stereo line channels, with a choice of linear or rotary VCA channel faders, along with the legendary Xone analogue filter and a host of other functions.

它能够安装在 19 寸标准机柜上占用 4U 面板空间，4 路立体声双输入通道、2 路单通道话筒及立体声线路输入通道、传统推子或 VCA 旋钮通道控制可选，同时还具备享有盛名的 XONE 模拟滤波器以及众多其他功能。

MAX1999EEI Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

MAX1999EEI引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S配对样本的支持下，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/遥测分比率为背景的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口的软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

TDA4864 Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

TDA4864引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S样本对支持，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/分比率背景遥测的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

This article analyzes the problems,such as the time delay and error code characteristic of optic fiber channel,path switching mistake caused by maintenance staff and improper parameter setting on 2 M channel retiming,which will produce negative influence on protection system.

文章分析光纤通道时延、误码特性、人为造成的通道倒换方式选择错误、2 M通道重定时参数设置不当等问题，研究这些问题给保护系统带来的负面影响，提出了光纤保护对通道的要求及注意事项。

Antinociception and VGSC-modulation of BmK IT2 and BmK AS—1. The results from nociceptive flexion reflex and plantar radiation heat showed: BmK IT2 (a depressant insect-selective neurotoixn) and BmK AS-1 (a new-type β-1ike neurotoxin) have significant antinociceptive effects on rat peripheral nerve system. The antinociceptive effects of BmK IT2 on the carrageenan-inflamed rats were significantly stronger than those on the normal rats. Whole-cell patch-clamping showed: Both TTX-S and TTX-R Na〓 currents induced from rat DRG neurons were significantly inhibited by BmK IT2 and BmK AS—1, and BmK IT2 was more sensitive to TTX-R than TTX-S component. All the results suggested: the peripheral antinociception of BmK IT2 and BmK AS—1 might be attributed to the inhibitory effects of them on the TTX-S and TTX-R Na〓 channel located on the peripheral ends of rat DRG neurons with small diameter.

中文题名特异性钠通道调制剂－长链蝎神经毒素的药理功能研究副题名外文题名 The study of pharmacological function of the specific modulators on voltage-gate Na+ channel-long chain scorpion neurotoxin 论文作者谭智勇导师吉永华研究员学科专业生理学研究领域\研究方向学位级别博士学位授予单位中国科学院上海生命科学研究院学位授予日期2002 论文页码总数93页关键词神经毒素毒理学电压门控钠通道东亚钳蝎钠通道调制剂馆藏号BSLW /2003 /R338 /22 本论文工作利用细胞和行为药理技术系统地研究了东亚钳蝎长链神经毒素的抗伤害性效应、对电压门控钠通道的电生理调制作用、改变胞内离子浓度的效应，并分析了相关的药理功能机制。

Currently in a surface warship of the our country everyplace all provided with the sail coal gas body to report to the police the instrument on the boat, gas density that sensor adopt to convey gas density value traditional 4-20mA mode of analog signal, have to each measure passway allocate one is it is it report to the police to measure to have and density value show measuring board of function, as the density of gas measures the passway board of the different quantities of different outfit of the figure of the passway, but there is many figure of the large-scale naval vessel passway, so the volume of warning system will become very huge , unfavorable to attenbants to use, and traditional 4-20mA electric current ring transmits the signal, unfavorable to transmitting at a long distance, easy to bring and interfere.

核心提示：摘要目前在我国各地型水面舰船上都配备了航煤气体报警仪，气体浓度传感器采用的是传统的4-20mA模拟信号的模式传送气体浓度值，只好每个检测通道配备一块具有检测报警及浓度值显示功能的检测板，随着气体浓度检测通道数目的不同配备不同数量的通道板，但大型舰船通道的数目比较多，因此报警系统体积会变得十分庞大，不利于操作人员使用，而且传统的4-20mA电流环传输信号，不利于长距离传输，容易带来干扰。为了巡检的需要，需要将其改造成现场智能仪表，通过将传感器检测结果

The absorption and distribution of chromium were studied in ryeusing nutrient culture technique and pot experiment.

采用不同浓度K2CrO4(0，0.4，0.8和1.2 mmol/L)的Hoagland营养液处理黑麦幼苗，测定铬在黑麦体内的亚细胞分布、铬化学形态及不同部位的积累。

By analyzing theory foundation of mathematical morphology in the digital image processing, researching morphology arithmetic of the binary Image, discussing two basic forms for the least structure element: dilation and erosion.

通过分析数学形态学在图像中的理论基础，研究二值图像的形态分析算法，探讨最小结构元素的两种基本形态：膨胀和腐蚀；分析了数学形态学复杂算法的基本原理，把数学形态学的部分并行处理理念引入到家实际应用中。