蚀刻

The electroplated ferronickel shutter is suspended by a silicon spring The shutter is fabricated by the nonsilicon surface micromachining techniques. The planar coil is fabricated by high-aspect-ratio photolithography and mask-plating processes. And the silicon spring and the fiber alignment components are fabricated by the reactive ion etching and by the silicon anisotropic etching process.

电镀铁镍制作的挡光片被固定在一个硅弹簧上，该挡光片采用非硅表面微加工工艺制作，平面电感线圈利用高深宽比的光刻工艺和掩蔽电镀工艺制作，硅弹簧和光纤对准元件采用反应离子刻蚀和硅的各向异性腐蚀工艺制作。

This paper introduced principle, process, characteristics and controlling deep slot of spiral groove movable ring of photoetching in the liquid hydrodynamic seal.

主要介绍了流体动力密封螺旋槽动环光刻工艺的特点、原理、工艺过程、工艺流程、槽深控制方法以及应用情况，提出了采用高能束流刻蚀螺旋槽动环的新途径。

The invention discloses a method to integrate single CMOS with bulk silicon microelectromechanical system, its technical project: 1 forming isolating groove: adopting deep-groove etching, and SiO2 and polycrystal silicon filling to realize the insulation of MEMS structure and CMOS circuit; 2 making standard CMOS circuit; 3 using SiO2 and Si3N4 as mask, etching silicon on the back until exposing SiO2 at the bottom of the isolating groove, to complete the thickness control for MEMS silicon structure layer; 4 completing metalizing the CMOS circuit and masking the MEMS structure: MEMS structure region uses Al as mask and CMOS circuit region uses thick photoetching glue as mask, using DRIE to release silicon structure.

本发明公开了一种将单片CMOS与体硅微机械系统集成的方法，其技术方案为：1形成隔离槽：采用深槽刻蚀，SiO 2 和多晶硅填充，实现MEMS结构和CMOS电路的绝缘；2完成隔离槽后进行标准CMOS电路的加工；3用SiO 2 和Si 3 N 4 作掩膜，从背面腐蚀硅，直至暴露出隔离槽底部的SiO 2 ，完成MEMS硅结构层的厚度控制；4完成CMOS电路金属化和MEMS结构掩膜：MEMS结构区用铝作掩膜，CMOS电路区用厚光刻胶作掩膜，用DRIE释放硅结构。用本发明方法不仅获得了较大的质量块，而且用本发明较高的深宽比制作出的结构电容，同时实现了体硅微机械与CMOS电路的集成，显著提高MEMS传感器的精度和稳定性，具有前沿性和重要实用价值。

The QVBA key micro-machined technology are also developed in this paper, such as: single step double sides multilayer photolithographic process, quartz crystal anisotropic etching process.

在仿真分析基础上，完成了石英振梁加速度计的设计及关键微加工工艺研究，包括：单步双面多层光刻工艺、石英晶体各向异性刻蚀工艺等。

The present invention generally provides methods for employing a focused particle beam system in the removal of an excess portion from a workpiece having an opaque film patterned on a substrate and more particularly provides methods of gas-assisted etching using an etching gas including bromine and water vapor.

本发明提供一种使用聚焦粒子束系统从其衬底上有不透明薄膜图形的工件中去除多余部分的方法，更具体地提供了使用含溴的刻蚀气体的气体辅助刻蚀方法。

Diamond cone arrays are successfully prepared through hydrogen plasma etching. The intrinsic columnar structure of the diamond films leads to the unevenly distributed ion etching rate, which plays an important role in the cone formation.

金刚石薄膜内在的柱状结构使氢离子在刻蚀薄膜时产生非均匀的刻蚀速率，对锥状表面的形成起着重要作用。

Results show that this etchant has a stable etching rate to both GaSb and AlGaAsSb compound materials; under suitable solution composition quite low etching rate could be obtained, which are useful for the fabrication of GaSb/AlGaAsSb devices.

该腐蚀液对于GaSb和AlGaAsSb材料具有良好的腐蚀特性和稳定的刻蚀速率。选用合适的溶液组份可以得到较低的刻蚀速率，有利于在器件工艺中进行精确控制。

The influence of deposition, annealing conditions, and etchants on the wet etch rate of plasma enhanced chemical vapor deposition silicon nitride thin film is studied.

本文研究了沉积、退火条件及刻蚀液对等离子体化学气相沉积氮化硅湿法刻蚀速率的影响。

For this process,the free-standing diamond thick films were dipped in a saturated iron chloride solution and dried in atmospheric ambient.

其工艺为：自支撑的金刚石厚膜浸入饱和的三氯化铁水溶液中，然后平放在大气环境中干燥，将处理过后的金刚石膜放入MPCVD装置中，先用氢等离子体将氯化铁还原成铁，然后在800℃左右的温度下，利用铁对金刚石的催石墨化作用及氢等离子体的刻蚀作用将其表面刻蚀。

The structure of the thin film capacitor 1 of this invention is: form sequentially at least the bottom electrode layer 102, the high dielectrics constant oxide film 103 and the upper electrode layer 105 on the semiconductor substrate 101; said upper electrode layer 105 which is a film layer 104 formed by the electrical conductive material which is processable by reactive ion etching, or a multilayered film composed of two kinds of film layers 107 and 108, which are each formed of a conductive material which is processable by at least two kinds of reactive ion etching.

要约 薄膜电容器1是至少在半导体基片101上按顺序形成下部电极层102、高介电常数氧化物膜层103、上部电极层105而构成的薄膜电容器，该上部电极层105由一种仅由可用反应性离子刻蚀加工的导电性材料形成的膜层104，或至少两种由可用反应性离子刻蚀加工的导电性材料分别形成层状的多层膜层107和108构成；经历350℃的热试验之后，对该薄膜电容器1施加OV到2V的驱动电压的薄膜电容器漏电电流密度为1×10 －8 A/cm 2 以下。

The split between the two groups can hardly be papered over.

这两个团体间的分歧难以掩饰。

This approach not only encourages a greater number of responses, but minimizes the likelihood of stale groupthink.

这种做法不仅鼓励了更多的反应，而且减少跟风的可能性。