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This paper based on the author's practical development experiences, details some important elements desiring consideration in the dual-processors mobile terminal system integration in physical layer such as how to choose the system architecture,how to inter-connect so many chips with perfect power group organization and interface power level deployment and also some basic low-level communication protocols between master processor and co-processor or other blocks.

本论文基于作者在移动终端研发领域的实际开发经验,详细的阐述和探讨了双处理器架构移动终端系统物理层集成时要考虑的很多因素,如系统架构的选择,芯片互联时的一系列物理层通信协议,芯片互联时电气特性的匹配要求和系统电源系统的配置等问题,其中互连协议是很关键的因素。

This article discusses the causes of metastable problems in PLDs and presents a reliable and convenient test scheme of PLDs'metastable performance. Metastability ; MTBF ; Test ; PLD

但是,在用PLD实现系统芯片(SoC,SystemOnChip)设计时,不可避免会出现多时钟域情况和异步输入情况,这将导致器件的亚稳态问题,成为影响芯片

In the first chapter, the progresses, integrated components and detection methods of microchip have been introduced.

第一章介绍了芯片的概念,以及芯片集成元件和检测方式的研究进展。

Until recently, each brand of microchip could only be read by its own brand of microchip scanner .

直到最近,每种品牌的微芯片仅能由同一品牌的微芯片识别机来辨认

The Affymatrix chip enabled laboratories to resequence the mitochondrial genome much faster than the traditional manual and automated strategies. Just as importantly, like an iPod to music lover, the chip served as the broad technological platform for laboratories to customize arrays more attuned to their research interests.

埃菲迈克斯公司的芯片使实验室能够与传统手工或自动化方案相比,更加快速的重测定线粒体基因组的顺序,就像苹果mp3对音乐爱好者的重要性一样,芯片为实验室对基因序列的更有效排序及针对性研究提供了广阔的技术平台。

The algorithm combines the simulated annealing algorithm with the ratio-cut idea to ascertain the level of the multi-level multi-way partitioning and considers the number of cut lines while partitions CLB into cluster, then performs a k-way optimization without changing the level, so as to achieve a better partition result and improve the usage in HFPGA, then optimize the FPGA performance.

该算法将模拟退火算法与ratio-cut思想结合,确定多层多划分的规模后,在不影响规模的情况下进行多分优化,实现更好的划分结果,从而提高FPGA芯片的利用率,进而优化整个芯片的性能。

The algorithm combines the simulated annealing algorithm with ratio-cut method to ascertain the level of the multi-level multi-way partitioning. Considering the number of cut lines while partitions CLB into cluster, it achieves a better partition result and improve the usage in HFPGA, then optimize the FPGA performance.

该算法将模拟退火算法与ratio-cut思想结合,确定多层多划分的规模后,采用数据结构进行多分优化,在将可配置逻辑块(configurable logic block, CLB)划分到各个簇的时候考虑割线数的目标函数,实现了更好的划分结果,提高了FPGA芯片的利用率,优化了整个芯片的性能。

A character's 8 bits are stored in a row of chips; the ninth chip holds the parity bit ,which id a 1 or 0 ,based on whether the parity scheme is odd or even .

一个字符的八位存储在一行芯片之中;第九个芯片保持了奇偶位,其代表了1或0,基于奇偶性模式是奇数还是偶数。

Pyrology ; chip cooling technique ; review ; chip package ; enhanced heat transfer ; gas cooling ; liquid cooling ; solid refrigeration

热工学;芯片冷却技术;综述;芯片封装;强化换热;气冷;液冷;固体制冷

In this flow a tradeoff of multiple test methods is adopted, which includes structural test, functional test and parametric test. Using the test mode of"stop as finding the fault"and based on the position of the first failure, we can label the faulty chips into different bins.

该流程综合采用结构测试、功能测试、参数测试等测试方法,采取"发现故障即停止"的测试方式,根据芯片首次失效的位置对失效芯片进行Bin的分类,有效增强了分析的针对性,缩短了测试时间。

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