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缓冲存储器

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The collectivity frame of testing system is described in the paper, then, the double data buffer circuit matching the data storage characteristic of FLASH memory and the center control circuit for completing data read-in, enumerating and erasure etc. are designed At last, the software flow of testing system is given as well.

论述了测试系统总体设计思想;设计了与FLASH存储器的数据存储特点相匹配的数据双缓冲电路,以及对FLASH存储器的数据进行写入、读出、擦除等操作的中心控制电路;并且设计了测试系统实现所有功能的软件流程。

If a phototypesetter is an intermittence type, the memory of controller is used only to buffer a section and the buffer of whole page lattice is unnecessary. If a phototypesetter is an uninterruption type, a section of lattice is only generated and buffered for every time and then be converted into black-white sectional information, whose information quantity is much less, by microprogram for buffering whole printed sheet. On scanning, the black-white sectional information is real-restored into lattice to output.

当照排机是"走走停停"类时,控制器的存储器只需缓冲一段,而不必缓冲整版点阵;当照排机是"不许停顿"类时,则用分段方法每次只生成一段点阵并缓冲,然后用微程序把这一段点阵转换成信息量少得多的黑白段信息作整版缓冲,扫描时在实时下把黑白段信息复原成点阵输出。

Some techniques, such as multiprocessor organization, pipeline, virtual memory, ring-protection of main memory, multiple memory modules with address interleaving, cache, RAS and 1/O standard interface, have been employed in the system. A simple form of single-arm-latch has been adopted. Operating system used in HDS-9 is symmetric to each processor.

此机在系统结构上采用多重处理机结构,流水线控制技术,虚拟存储器技术,存储器环状保护技术,存储器多模交叉访问,高速缓冲技术,RAS技术,统一标准接口的I/O系统;在工艺技术方面采用高密度组装技术,用SSI-TTL电路组成单臂门闩触发器系统;在系统软件方面采用匀称或平等的操作系统来处理多重处理机关系。

Some techniques, such as multiprocessor organization, pipeline, virtual memory, ring-protection of main memory, multiple memory modules with address interleaving, cache, RAS and 1/O standard interface , have been employed in the system. A simple form of single-arm-latch has been adopted.

此机在系统结构上采用多重处理机结构,流水线控制技术,虚拟存储器技术,存储器环状保护技术,存储器多模交叉访问,高速缓冲技术,RAS技术,统一标准接口的I/O系统;在工艺技术方面采用高密度组装技术,用SSI-TTL电路组成单臂门闩触发器系统;在系统软件方面采用匀称或平等的操作系统来处理多重处理机关系。

Cahe size: 7670KB Minimum cache size: 1024KB Write -through drivces: A B Current options:/MLX Program is loaded intoconventional and XMS memory using DPMS /BL=16 Lookahead buffer is in intoconventional memory, size is in KB /LEMD=ON Lend memory to other applications - 6646 KB available /DELAY=OFF Write delay is disableed, caching is write-through Caldera DR-DOS 7.03 Copyright 1976, 1998 caldera, Inc. ALL rights reserved.

cahe大小:7670kb最低缓存大小:1024kb撇通过drivces:二当前选择:/MLXintoconventional和纲领是装用xms记忆之上/血液=16Lookahead的缓冲存储器是在intoconventional,硅泽是字节/lemd=内存就借给其他应用-可供697千字节/延迟过写延迟=disableed,钙费玉清撇通过卡尔德拉博士-7.03著作权国务院1976年1998卡尔德拉股份有限公司版权所有。

If a phototypesetter is an intermittence type, the memory of controller is used only to buffer a section and the buffer of whole page lattice is unnecessary. If a phototypesetter is an uninterruption type, a section of lattice is only generated and buffered for every time and then be converted into black-white sectional information, whose information quantity is much less, by microprogram for buffering whole printed sheet. On scanning, the black-white sectional information is real-restored into lattice to output.

当照排机是&走走停停&类时,控制器的存储器只需缓冲一段,而不必缓冲整版点阵;当照排机是&不许停顿&类时,则用分段方法每次只生成一段点阵并缓冲,然后用微程序把这一段点阵转换成信息量少得多的黑白段信息作整版缓冲,扫描时在实时下把黑白段信息复原成点阵输出。

It's a clever technique to help a computer processor work more smoothly.

高速缓冲存储器是完全针对速度和效率的设计,它能帮助计算机更平稳的工作。

Furthermore, if one or more small data blocks accessed before exist among its corresponding large block of data to be expelled from the fully associative buffer, the small block accessed is copied to the direct-mapped cache.

而且,如果以前被访问的一个或多个小数据块,存在于它的将要从完全联系的缓冲器中挤出的相对应的大块数据之中,就将被访问的小块复制到直接映射的高速缓冲存储器中。

The cache freshing and flushing mechanism is designed differently by different vendors.

各个制造商对高速缓冲存储器溢出以及清空机制设计不同。

A cache memory method and corresponding system for twodimensional data processing, and in particular, twodimensional image processing with simultaneous coordinate transformation is disclosed.

本发明公开了一种用于二维数据处理特别是同时进行坐标转换的二维图像处理的高速缓冲存储器方法及其对应的系统。

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