管脚

An external resistor and capacitor network is typically connected from this pin to ground to provide loop compensation.

一个外部电阻器和电容器的网络通常是由该管脚连接到地面，以提供环路补偿。

Design timing constraints, such as allocating a specific net to a special function FPGA pin

设计时间约束，比如分配一个具体的网络到一个具体的FPGA器件的管脚

Product Introduction : The PRAD 780 universal screw terminal boards provide convenient and reliable si .

通用螺丝终端板卡，为数据采集卡的20管脚的平板电缆连接器提供方便和可靠的信号配线。

Product Introduction The PRAD 780 universal screw terminal boards provide convenient and reliable sig .

通用螺丝终端板卡，为数据采集卡的20管脚的平板电缆连接器提供方便和可靠的信号配线。

The Aux_R, Aux_G, Aux_B input pins are typically connected to the auxiliary SCART connector.

该Aux_R，Aux_G，Aux_B输入管脚通常连接到辅助的SCART连接器。

A receptacle configured on the hinge fitting to receive a shear pin to couple the hinge fitting to the control surface.

一个盛器上配置铰链拟合得到剪切管脚夫妇铰链装置的控制面。

The AD9856 is available in a space-saving surface-mount package, and is specified to operate over the extended industrial temperature range of 40°C to +85°C.

这ad9856生效在应答间隔除外部管脚包装外，并且是指定到运行该扩展产业的温度范围从40°C到+85°C。

The filter is fixed based on the characteristics of patterns of BGA leaders and the subface to reduce the noise effectively.

针对BGA管脚图样和底面图样的特点，分别确定了滤波器，有效减少了噪声的影响。

In case of 8-bit pull-up resistors/termination resistors, if footprint area needed for 8 chip resistors(1608 size) is considered as 100%, area requirement is only 8 for 2 chip network resistors CN1J4 (with 4 elements) and 45% for one CND1J10 (with bussed 8 elements).

如果八个分离的上拉/终端电阻（1608封装）的管脚布线面积认为是100%的话，8的电阻只需要两片网络电阻 CN1J4(4个电阻)，而用 CND1J10（8的电阻）的话，面积只是分离电阻的45%。

A single pin provides dimming and control.

简单的管脚提供变暗和控制功能。

They weren't aggressive, but I yelled and threw a rock in their direction to get them off the trail and away from me, just in case.

他们没有侵略性，但我大喊，并在他们的方向扔石头让他们过的线索，远离我，以防万一。

In slot 2 in your bag put wrapping paper, quantity does not matter in this case.

在你的书包里槽2把包装纸、数量无关紧要。