硬件实现的

We proposed the simplest structure of 2-D bilinear transformation digital circuit, we proposed four approaches of the realizations:(1) Realization of 2-D discrete domain difference equations;(2) 2-D FFT realization;(3) Digital hardware implementation;(4) by 2-D recursive digital structure to realize them.

在第七章，我们则重点研究了二维数字滤波器的实现问题。我们对第六章提出的2-D双线性变换电路又作了进一步的简化，获得了一种最简结构的二维双线性变换数字电路，该电路仅有二个延时器和一个乘法器。在第七章里，我们提出了二维跳耦型数字滤波器的四种实现方法：(1)二维时域差分方程实现；(2)二维FFT实现；(3)数字硬件实现，(4)用2-D递归数字结构实现。

Based on the research results of Chaos theory, in this dissertation, it has made detailed analysis of the chaotic signal generator. Firstly, the characteristic and various detection methods of chaotic signal are recommended. Secondly, with the aid of software, such as MATLAB, PSPICE, EWB, etc, discussion of the process of generating chaotic signal proceeds. Through simulation, the output result of several kinds of chaotic circuit are analyzed and compared. Thirdly, aiming at Chuas chaotic circuit, through debugging, the impacts by components and parts in the circuit, such as operation amplifier, capacity, inductor, etc, has been further investigated. And then provides a new scheme to implement Lorenz chaotic system, the circuit design and analysis are presented in detail and it can be realized by the hardware of programmable arrays FPGA, the experimental results indicate that this scheme has the advantages of easy operation, flexible design and high efficiency. An application example in secure communications is also provided. Finally, through picking up the characteristic parameter-Lyapunov exponent of the Chaos we can analyze the performance of different chaotic signal generators.

本文在混沌理论研究成果的基础上，对混沌信号的产生做了详细的分析，涵盖以下内容：首先介绍了混沌的定义，混沌信号的基本特性和各种判别方法，特别是对简单的一维Logistic映射的硬件实现问题做了初步探索；其次对混沌信号的产生方法进行讨论，借助于MATLAB、PSPICE、EWB等仿真软件，对几种混沌电路输出的混沌信号进行了分析比较，并在此基础上针对典型三阶连续自治系统Chua's电路作进一步实验研究，通过混沌电路调试，深入研究电路中各元器件，特别是运算放大器、电容、电感等对混沌信号时域以及频谱的影响；再次研究连续混沌系统的数字化硬件产生，设计了Lorenz混沌电路在现场可编程门阵列FPGA上实现的新方案，在保密通信中的应用实验结果表明该方案具有操作简单、设计灵活、效率高等优点；最后针对不同混沌系统，采取不同算法，提取混沌特性参数Lyapunov指数，进而对不同的混沌信号发生器的性能进行了分析。

At the end of this thesis, the simulation of correlator of received signals with FPGA has made.

讨论了移动台定位系统中对接收信号进行相关处理的相关器的硬件实现，并在硬件仿真平台上进行了仿真，给出了硬件仿真结果。

and program of DMA transfer data is realized with VHDL language.

提供了基于PCI总线的多通道同步串行数据采集系统的硬件实现方案，分析了整个系统的结构，详细描述了FPGA内部硬件资源的划分和使用VHDL语言实现DMA传输数据的方法和源代码。

The paper further realizes a hardware accelerate boundary-scan controller to improve the performance of the remote experiment system. The controller can realize the process of "configuration" and "verify"automatically without the control of CPU. The controllers operation in the remote experiment system can reach the expected goal. By performance analysis, we conclude that hardware accelerate boundary-scan controller is significant faster than that realized with software.

从提升远程实验系统性能出发，本文进一步设计实现了一个硬件加速的边界扫描控制器，该控制器能够完成对目标FPGA的"配置"和"验证"，执行过程中不需要CPU干预，在整个远程实验系统联合调试的过程中，运行完全正常，达到了预期目标，并且通过性能分析证明，硬件加速的边界扫描控制器相比于软件实现，速度有显著提升。

A new decoder architecture is proposed to solve the problem of huge resources use in traditional LDPC decoder, which needs less logic resources and memory resources by dividing submatrix to improve serial factor of decoder.

针对传统译码器硬件资源消耗巨大的缺陷，提出一种新型的译码器硬件实现方案，通过切割子矩阵的方法，进一步提高硬件结构的串行度，从而大大减少了逻辑资源和存储块的使用。

On the base of studying application methods and relative information of the relative chips, the paper designed the system hardware ,including LCD interface designing、video gathering chip and its peripheral circuit designing、FPGA chip and other module interface designing; 3、The LCD controller module、video in controller module、configuration initialized module of the video image decode chip、FPGA and program of module interface were all compiled and debugged in the paper. 4、The whole system debugging was carried through, and the video image data storage and displaying on LCD screen was carried out in the paper. The paper first designed the system frame, then designed hardware platform according to the system frame and then analyzed it、debugged it, finally,compiled the module code and debugged the whole system to achieve system requirements.

本文具体研究工作主要体现在以下几个方面： 1分析了的嵌入式视频图像采集、处理与LCD显示系统的总体需求，设计了基于NIOSⅡ的嵌入式系统总体架构； 2在学习相关芯片的具体应用方法和相关知识的基础上，设计了系统的硬件，包括LCD接口设计、视频采集芯片及外围电路设计、FPGA芯片和其他模块接口主板设计； 3编写并调试了LCD控制器模块、视频输入控制器模块、视频解码芯片初始化配置模块、FPGA和各个模块接口程序； 4进行了整个系统的联调，完成了视频图像数据存储并通过LCD显示；本文首先建立了系统架构，然后根据系统架构进行硬件平台的设计并对硬件平台进行分析和调试，最后编写个模块代码并完成系统联合调试实现系统要求。

As for the realization of hardware,the thesis depicts the realization of every partof music recognition system based on the TMS320VC5402 in detail;as for thedevelopment of software,the thesis gives the software design flow chart of the musicrecognition system,simulates the basic theory with MATLAB language and gives thesimulation results.Well,with the characteristic parameters of the vocality and theinstrumental music,we can recognize the input digit music speech successfully andput forward it's pitch,cadent,and sing name.The result is comform that the musicrecognition based on the TMS320VC5402 is run well and the accuracy reaches 96percent.and it can meet the needs of the practicality application.

在硬件实现上，详细阐述了基于TMS320VC5402DSP的嵌入式音乐识别系统的各部分硬件设计，在软件开发上，给出了嵌入式音乐识别系统软件设计的各部分流程，并对各部分进行了仿真试验，给出了仿真结果，并分别对声乐和器乐这两种音乐信号进行了模板特征参数提取及其与待测信号进行匹配识别，试验结果表明：对音乐信号的识别精度在96%以上，成功实现了对音乐的音高、唱名、节奏的识别，满足了实际应用的需求。

The principle of system design is as follows: At first, compartmentalizing the arithmetic of sterovision measurement. We use FPGA logic units Customized hardware blocks to implement the arithmetic which is simple and large data-computing, and the data is transferred on pipeline between each blocks, otherwise, use software program in NiosⅡ to implement the complicated and small data-computing arithmetic. So the system is high-speed and flexible.

系统设计的基本思想如下：首先针对视觉测量算法进行划分，对算法简单、数据处理量大的部分用 FPGA逻辑单元自定义硬件模块的方法实现，各硬件模块之间数据采取流水线操作；算法复杂、数据处理量小的部分则在 Nios II软核中用软件的方法实现，从而使本系统既具速度优势又具良好的灵活性。

Security functions will be moved from software to hardware, where they' re more tamper-proof. In September, Intel announced that it would work with VeriSign Inc. to implement in hardware VeriSign's digital certificate technology for notebook computers that use Intel's Banias processors.

安全功能将从软件移到硬件，在硬件中它们更能防止泄密。2001年9月，英特尔公司宣布将于VeriSign公司合作，为采用英特尔Banias处理器的笔记本计算机用硬件实现VeriSign的数字证书技术。

But we don't care about Battlegrounds.

但我们并不在乎沙场中的显露。

Ah! don't mention it, the butcher's shop is a horror.

啊！不用提了。提到肉，真是糟透了。