电路

In this paper, the CPLD/FPGA development system is presented. It demonstrates the interface circuit of FPGA and different ways to configurate FPGA.

中文摘要：本文阐述了CPLD／FPGA开发系统的设计，介绍了FPGA的外围接口电路及用多种方式对FPGA进行配置的电路，采用VHDL语言设计控制电路配置到CPLD中进行接口模块的控制。

The diagram schematics are figured out by using commonly-used chip named 555 timer and 74LS90 conter, tests are given on the simulation in every unit, simulation effect of circuit can be observed in a direct and clear way.

使用常用的芯片555定时器和74LS90计数器设计了电路原理图，对电路的每个单元进行了仿真实验，可以直观地观测出电路的仿真效果。

The concerned research works of VFTO is investigated.A new transient circuit model to the question of the steep front and high amplitude value of VFTO is proposed based on general transient circuit model. The numeric simulation that disconnector switched off short bus has been proceeded by using above circuit model and the comparison of results with the one based on EMTP are given.

首先针对操作GIS中隔离开关所产生的快速暂态过电压上升时间短及幅值高的特点，在一般暂态电路模型的基础上提出了新的暂态电路模型，并利用该模型，对GIS中隔离开关切断短母线的等值电路进行了数值模拟，并与电磁暂态程序的计算结果进行了比较。

In the system design, the communications between epigynous PC and hypogynous SCM follows the RS-232 criterion, AT89C51 chosen as core hardware, voltage conversion circuit, display circuit, data collection circuit are introduced.

在系统设计中，上、下位机的通信采用RS—232标准，选用ATMEL公司的89C51单片机作为核心硬件，设计了电平转换电路、显示电路、数据采集电路等；软件部分采用VB6.0作为开发工具，采用模块化设计方法，对串口通信模块、滑动轴承油膜压力测试模块、打印预览模块、滑动轴承摩擦特性实验模块等模块进行了设计与说明。

This product is applicable to coal mine where has explosible dangerous gas and coal dust,It is used for controlling direct starting stop and reversion of three-phase squierrel cage type asynchronous motor whose rated current up to 400A in system of AC50Hz rated voltage 1140V or 660V, Meanwhile it protects the electromotor and relative circuit, The starter can be combined with firedamp sensor and used to test the consistency of mining working area,the starter will trip when it exceed the limit ;adopt intrinsic safety type circuit for the control circuit; possess the function of local control and remote control by single set and multi sets procedure control; display working voltage current and gas consistency can remember fault parameter

该产品适用于具有爆炸性危险气体和煤尘的矿井中，在交流50Hz，额定电压为1140V或660V ，控制额定电流只400A的三相鼠笼式异步电动机的直接起动，停止及反转，同时对电动机及有关电路进行保护，起动器可与甲烷传感器相连接用于检测才掘工作面的甲烷浓度，当其超限时起动器跳闸；控制电路采用本安型电路；具备单台就地控制与远方控制及多台程序控制功能，能显示工作电压、电流、瓦斯浓度，并能记忆故障参数。

TheSG3525 internal integration has the 5.1V voltage source (its precision can achieve 5.1±1%V), the double threshold comparator(with the exter connection electric circuit consist of constitution oscillator), the temperature compensation circuit, the over-current protection circuit, two levels of differential amplifiers and so on.

SG3525片内集成有5.1V基准电压源（精度可达到5.1±1%V）、双门限比较器（与外部的接口电路构成振荡器）、温度补偿电路、过流保护电路、两级差分放大器等。

Along with development of electronic technology, especially VLSI and mixed signal circuits,where there are physical or functional blocks and subnetworks which are indiscerptible in the network, it shows its practical value.

随着电子技术的发展，特别是超大规模模拟电路和模数混合电路发展，对于电路中存在着物理上或功能上具有不可分割的功能块或子网络时，该方法更显其工程实际意义。

With the current mode logic structure, the input buffer and the predriver circuit have the capability of transmission and amplification of high speed data. By employing MOS-HBT cascode structure as the output stage, the laser diode driver exhibits very high speed and efficiency working at the 10 Gb/s data rate.

输入缓冲、驱动放大电路采用电流模电路，满足高速数据传输和放大的能力，输出级电路结构采用新型的MOS-HBT共源共栅结构可以降低米勒效应减小输入电容，从而使激光驱动芯片工作在10Gb/s时也能达到良好的性能。

At first, this paper gives the brief introduction of the history and present status of accelerometer and its testing technology, the working principium and math model of the liquid floated pendu-lous accelerometer, and then, decides the binary width pulse force retrim loop as the design proposal of testing system, researches the transfer function of every part in the system emphasizly, analyses the stability of the whole accelerometer testing system from the angle of control theoretics by the open loop transfer function of system, and designed the correcting net, analyses the basal problems such as resolution, sampling restraint, precision and so on, designs the hardware testing circuits such as preamplification, band-pass filter, alternating amplifier, phase sensitive demodulatorn, pulse-width modulation, frequency scale circuit, moment current generator. Finally, using the graphics program language LabV-IEW which is designed for testing field especially by NI accomplishes the solfware design of testing system,realized the testing functions.

首先对加速度计及其测试技术的发展历史和现状，液浮摆式加速度计的工作原理和数学模型等作了简要的介绍，然后确定了以二元调宽脉冲再平衡测试回路为设计方案，并从控制理论的角度进行了分析，着重研究了系统中各部分的传递函数，利用系统开环传递函数分析了系统的稳定性，同时设计了系统的校正网络；分析了二元调宽脉冲再平衡测试回路的分辨率、采样约束以及测试精度等基本问题，并按照系统分析的结果设计了包括前置放大、带通滤波、交流放大、相敏解调、脉宽调制、频标电路以及力矩电流发生器等测试系统各部分硬件电路，验证了电路的正确性，最后按照测试系统的要求，采用了美国NI公司专为测试领域所开发的虚拟仪器工具——LabVIEW作为测试软件开发工具，利用该图形化编程语言完成了测试系统软件部分的设计，实现了测试功能。

Such kind of implemetation can perform irrevertable or reverable speed control. the part of pwm is built on the platform of arm embedded system. it can generate two adjustable impulses which can complement each other through the control of the timers in s3c2410x chip by c programming.

系统主电路采用大功率gtr为开关器件，h桥双极式电路为功率放大电路的结构，即可完成不可逆调速同时也可完可逆调速。pwm调制部分是在arm嵌入式开发平台之上，运用c语言编程控制s3c2410x芯片的定时器来产生两路互补的宽度可调的矩形波。

The split between the two groups can hardly be papered over.

这两个团体间的分歧难以掩饰。

This approach not only encourages a greater number of responses, but minimizes the likelihood of stale groupthink.

这种做法不仅鼓励了更多的反应，而且减少跟风的可能性。