电源频率

This produces a waveform of one polarity operating at a frequency twice that of the mains supply.

经过整流后得到的是一个频率为交流电源两倍的单极波形。

1101B. The unit incorporates an RF Signal Generator, FLEX/POCSAG Encoder, IF Frequency Counter, AC Millivolt Meter, IF Signal Generator and a 1.5 VDC power supply.

该装置包括一个射频信号发生器，flex/pocsagencoder，如果频率计数器，交流毫伏表，如果信号发生器和一个1.5伏直流电源。

The frequency of this synthesizer can be changed from 405700.0000Hz to 405799.9999Hz with a minimum step frequency of 1 ×10-4Hz. The measured results show that nonharmonic interrelated spurious output of the synthesizer is less than -85dB.

该综合器的非谐波相关的寄生输出小于-85dB，频率的短期稳定度是2.07×10~(-11)/0.1s、2.48×10~(-12)/1s、2.88×10~(-13)/10s；当温度由20℃变至40℃时，综合器相位漂移Δφ=28.8°；当电源电压为+16V～+19V或+5V～+6V时，综合器输出相位不变。

The output voltage of power supply is AC sinusoidal wave. When the sinusoidal peak-to-peak applied voltage is about 9kV and its frequency is about 10kHz, the APSGD will appear, and the luminescence thickness of plasma is less than 1mm. This experiment result agrees well with the calculated results.

实验中电源输出的电压波形为交流正弦波，在峰-峰值电压为9kV时发生沿面辉光放电的电压频率为10kHz，同时等离子体发光厚度低于1mm，上述实验结果较好得验证了理论计算的结果。

7 To 3.3 V operating supply voltage 44.1 kHz sampling frequency 16.9344 MHz (384fs) system clock Built-in crystal oscillator circuit 16-bit, MSB rst, rear-packed serial data input format ( 64 fs bit clock) 8-times oversampling digital lter · 32 dB stopband attenuation ·+0.05 to -0.05 dB passband ripple Deemphasis lter operation · 36 dB stopband attenuation ·-0.09 to +0.23 dB deviation from ideal deem- phasis lter characteristics Attenuator · 7-bit attenuator (128 steps) set by microcontrol- ler Soft mute function set by parallel setting ·(approximately 1024/fs total muting time) Mono setting · Left or right channel mono selectable by micro- controller Built-in innity-zero detection circuit , two-channel D/A converter · 3rd-order noise shaper · 32fs oversampling Built-in 3rd-order post-converter low-pass lters 24-pin VSOP package Molybdenum-gate CMOS process

2.7至3.3 V工作电源电压为44.1千赫的采样频率16.9344兆赫（384fs）系统时钟内置晶体振荡器电路的16位，MSB在前，后包装的串行数据输入格式（64飞秒位时钟）8倍超采样数字滤波器·32分贝的阻带衰减·+0.05至-0.05分贝通带纹波去加重滤波器的运作·36 dB抑制频宽衰减·-0.09到0.23 dB的偏差认为不理想，症状困扰评估滤波特性衰减器·7位衰减器（128级）集由单片机在-莱尔软静音功能的平行设置·（共约1024/fs静音时间）单声道设置·左或右声道单声道微控制器可选的内置的无限零检测电路Δ，两通道的D / A转换器·第三阶噪声整形·32fs过采样内置三阶后转换器的低通滤波器24引脚VSOP封装钼栅CMOS工艺

Power to switch to a high frequency, high efficiency, high power density, high power factor, high reliability.

使开关电源达到了频率高、效率高、功率密度高、功率因素高、可靠性高。

This paper is presented in a AT89C51 microcontroller as the core to the simple power line loading dual signal recognition system design. In this system, we design the integrated power, frequency signal generator, and use of four light emitting diode as Display interface, double-button switch-mode power line load control signal.

本文就是介绍了以一种以AT89C51单片机为核心的简单两路路电力线加载信号识别系统的设计，在系统中，设计了集成电源、频率信号发生器，并运用4个发光二级管作为显示界面，采用双按键开关模式控制电力线加载信号。

Constant primary winding current independent of load level is inherent in the proposed system so that power could be transmitted from power source to load in a stable manner.

额定频率下系统一次侧线圈电流保持恒定而与负载大小无关，保证电能由电源向负载的稳定传输。

Thanks to this scheme, the phase, root-mean-square value, frequency, and waveform of the output sinewave voltage can be controlled precisely and the system has excellent steady-state performance, fast dynamic response performance, fast and reliable current cut-off protection function.

提出了一种新的适应"模块化"要求的高性能逆变电源控制方案，该方案是一种带有输出电压相位控制及负载电流前馈控制的多环反馈控制方案，能对输出正弦波电压的相位、有效值、频率、波形进行精确控制，使系统具有良好的稳态、动态特性以及快速可靠的截流保护功能。

During the testing process, the circuit use the on-off power supply's pull and push structure as prototype, gaining a additional LC in series resonance circuit, which is also a opposite sharp structure. In the same frequency,and in the work state of work voltage, receiving even more high efficiency and output power.

该电路在实验过程中以开关电源推挽式结构为原型，改进得到一个附加了LC串联谐振回路的反激式结构，在同等工作频率、工作电压的状态下，得到了比推挽式结构更高的效率和输出功率。

The concept of equivalent rotationally rigidity is offered and the formula of rotationally rigidity is obtained.

主要做了如下几个方面的工作：对伸臂位于顶部的单层框架—筒体模型进行分析，提出了等效转动约束的概念和转动约束刚度的表达式。

Male cats normally do not need aftercare with the exception of the night after the anesthetic.

男猫通常不需要善后除了晚上的麻醉。