电刻

A novel arrow-shaped monopole antenna with a coplanar waveguide feed line is presented. The element and the feed line are etched on the same side of a substrate.

提出了一种新颖的共面波导馈电单极天线，"△"形辐射单元馈刻在介质板上，由同一面的共面波导传输线馈电。

Cerotype:The process of preparing a printing surface for electrotyping by first engraving on a wax-coated metal plate.

蜡模，蜡刻制版法：一种通过先在涂蜡金属板上刻字来准备电版印刷平面的工序。

AC plasma is now used for etcher, which supplies much of the energy needed to support a gas reaction near the wafer surface.

电浆分为交流电浆和直流电流电浆，现在的蚀刻机台一般用交流电浆提供发生在硅片表面的气体反应所需的大部分能量。

Main process gases used in the metal etcher of the semiconductor industry are chlorine and boron chloride. Process gases are ionized in the reactor chamber to form free radicals by plasma, which etches off aluminum film from the wafer surface.

半导体金属蚀刻制程主要使用氯气及氯化硼等气体，以高能电浆离子化产生自由基后使其与晶圆表面之铝反应将多余之铝蚀刻而产生沟槽。

There are three platinum catalyst micro channels which have different width ,such as 1000 m , 400m and 40m. The platinum catalyst micro channel reactor is fabricated by MEMS technology. The reactor uses the exothermic reaction of hydrogen and oxygen on the platinum catalyst plate as the heat source and the platinum thin film resistance deposited on a glass chip by face micro machining process as catalyst and temperature sensor. The channel is bonded with a cover plate etched by bulk micromachining technology to become a mico- channel reactor.

实验主要以微机电加工技术制作白金触媒微管道反应系统，利用微机电面型加工技术将白金薄膜电阻制作於基材为玻璃的晶片上，以此为反应所需的触媒及温度量测元件，并用体型加工技术蚀刻出微流道的上盖板相结合成微管道反应系统，本研究以1000μm、400μm及40μm的白金触媒微管进行测试，并利用微管道管壁上触媒表面降低反应活化能的特性来维持反应，此微反应系统利用氢气与氧气在白金触媒平板上的放热反应作为能量的来源。

Often called planar transistors, they are built on the surface of a silicon wafer by using a manufacturing process that precisely deposits and then etches away different insulating, conducting and semiconducting materials with such precision that the industry is now approaching the ability to place individual molecules.

通常被称为「平面电晶体」，运用一个将电晶体精确放置在晶片的表面，蚀刻掉不同绝缘、导体和半导体材料的制程，以此精密技术业界将能够在晶片上面放置个别分子大小的材料。

Often called planar transistors, they are built on the surface of a silicon wafer by using a manufacturing process that precisely deposits and then etches away different insulating, conducting and semiconducting materials with such precision that the industry is now approaching the ability to place individual molecules.

当今制造微处理器和记忆晶片的电晶体有数抳鹜荂C通常被称为「平面电晶体」，运用一个将电晶体精确放置在晶片的表面，蚀刻掉不同绝缘、导体和半导体材料的制程，以此精密技术业界将能够在晶片上面放置个别分子大小的材料。

The array chip takes a flexible transparent polyimide thin membrane as the base, the lower surface can form a cross comb-shaped array multimicroelectrode, the electrode group is composed of two comb-shaped microelectrode array electrodes which are mutually crossed but not contacted with the electrical structures not being connected, and the microchannel between the both internal electrodes of the electrode group serves as the service passage; the array chip is inversely buckled on the fusion pool, and the cross comb-shaped array multimicroelectrode on the array chip correspondes to the cell electric fusion pool and falls in the cell electric fusion pool.

阵列芯片以柔性透明聚酰亚胺薄膜为基底，下表面通过蚀刻形成交叉梳状阵列化微电极组，电极组由两个相互交叉、互不接触、电气结构上互不连接的梳状微电极阵列电极构成，电极组内部微电极之间的微通道为工作通道；阵列芯片倒扣于融合池上，其上的交叉梳状阵列化微电极组与细胞电融合池相对应，落于细胞电融合池中。

The source and leak electrode metal layers and pixel electrode layer can be sedimented in the same or different sputtering equipments continuously, which improve the utility of sputtering equipment.

本发明通过将原来的5Mask工艺简化为3Mask工艺，共减少两次光刻过程，从而达到减少工艺步骤的目的；同时本发明通过合并源漏电极和像素电极光刻，使得源漏电极金属层和透明像素电极层可以在同一台溅射设备中连续沉积，从而提高溅射设备的利用率。

The structure of the thin film capacitor 1 of this invention is: form sequentially at least the bottom electrode layer 102, the high dielectrics constant oxide film 103 and the upper electrode layer 105 on the semiconductor substrate 101; said upper electrode layer 105 which is a film layer 104 formed by the electrical conductive material which is processable by reactive ion etching, or a multilayered film composed of two kinds of film layers 107 and 108, which are each formed of a conductive material which is processable by at least two kinds of reactive ion etching.

要约 薄膜电容器1是至少在半导体基片101上按顺序形成下部电极层102、高介电常数氧化物膜层103、上部电极层105而构成的薄膜电容器，该上部电极层105由一种仅由可用反应性离子刻蚀加工的导电性材料形成的膜层104，或至少两种由可用反应性离子刻蚀加工的导电性材料分别形成层状的多层膜层107和108构成；经历350℃的热试验之后，对该薄膜电容器1施加OV到2V的驱动电压的薄膜电容器漏电电流密度为1×10 －8 A/cm 2 以下。

This one mode pays close attention to network credence foundation of the businessman very much.

这一模式非常关注商人的网络信用基础。

Cell morphology of bacterial ghost of Pasteurella multocida was observed by scanning electron microscopy and inactivation ratio was estimated by CFU analysi.

扫描电镜观察多杀性巴氏杆菌细菌幽灵和菌落形成单位评价遗传灭活率。