模数转换器

Technology compliable, performance optimized analog-to-digital converter is an important building block in SOC.

与数字电路工艺兼容的、功耗面积等指标优化的高性能模数转换器是SOC中非常重要的单元。

As in the previous application, the ADC outputs a digital code, Dout, the ratio of AIN to VREF.

和在这种先前应用相比，模数转换器输出一个数字式编码， Dout， AIN比率VREF

On the foundation that designs research eclectically in module, CMOS twinkles model modulus converter can be achieved high-powered with low power comsumption.

在模块折中设计探究的基础上，CMOS闪烁型模数转换器可达到高性能和低功耗。

PeakStop is a smooth well-controlled soft clipper whose behavior is sonically similar to the gentleness of OverEasy compression; its clipping is much preferable to a power amp's or analog-to-digital converter's.

峰值终止是一个平滑的很好控制的软剪切，如同OVEREASY压缩一样具有柔合性。它的剪切作用在功放或模数转换器中有着优越的性能。

Specially,it introduced the process and algorithm of error compensation which has been effective on controlling the measure error within the range of requirements of the whole system.

摘 要：为了提高电池检测系统中电池测量的精度，对MAX197模数转换器的主要误差源进行了较详尽的分析与测试，在此基础上提出了提高测量精度的建议和处理方法，其中对误差补偿方法，给出了具体的过程和算法，在实际应用中已有效的将测量误差控制在系统的要求范围内。

The Unity Gain ISO is the ISO of the camera where the A/D converter digitizes 1 electron to 1 data number in the digital image.

单位增益ISO是相机的模数转换器数字化1个电子到数字图像中的一个数值的ISO。

Oversampling based Sigma-Delta modulation technique once had been widely used in low-speed high-resolution field, but they has excessed this limitation for high-speed device development and the strong requirements of modern wire/wireless communication.

但这种局面已经改变，一方面由于现代CMOS工艺的进步使系统工作时钟频率不断提高，另一方面受到现代通信系统巨大需求的刺激，现在Sigma-Delta模数转换器早已突破了1MHz的带宽限制，并持续往高速应用领域发展。

This paper presents a pipelined current mode analog to digital converter designed in a 0.5-μm CMOS process.

提出了一种流水线电流模式模数转换器的设计，采用0.5微米CMOS工艺进行设计。

The simulation result verifies the validity of the method, and proves the function of the design.

得到的仿真结果证明确实实现了模数转换器的功能，验证了所提出方法的可行性。

And optimization techniques have been presented, which cover the key blocks of pipeline ADC, such as MDACs, Sub-ADCs, clock generator, digital correction circuits etc. This research focuses on minimizing power dissipation in high speed piplined ADCs.

接着从分析流水线模数转换器系统误差来源以及流水线各级精度要求入手，着重对系统结构、MDAC、Sub-ADC、时钟发生器、数字纠错逻辑等五大模块提出优化方案。

Plunder melds and run with this jewel!

掠夺melds和运行与此宝石！

My dream is to be a crazy growing tree and extend at the edge between the city and the forest.

此刻，也许正是在通往天国的路上，我体验着这白色的晕旋。