晶体管

TI develops the silicon junction transistor.

德州仪器开发的硅晶体管。

It also makes leaky transistors leak more, and the more they leak, the hotter they get.

这也使得晶体管泄漏漏多，越泄漏，他们得到的热。

It was built from discrete transistor digital circuit logic and had a hard disk for main memory.

它建于离散晶体管逻辑电路和数字硬盘进行了内存。

In this thesis, the fabrication of planar resonant tunneling diodes and mesa-type resonant tunneling diodes, the measurement and analysis of MOBILE(monostable-bistable transition logic element)circuit cell build up by planar resonant tunneling diodes, the measurement and analysis of series resistance of resonant tunneling diodes, and fabrication of resonant tunneling transistor are studied.

本论文包括了平面型共振隧穿二极管的研制、台面型共振隧穿二极管的制作、由平面型共振隧穿二极管组成的MOBILE单元电路设计与测试、共振隧穿二极管的串联电阻的分析与测试以及共振隧穿晶体管的研制等研究内容。

Verilog adds transistor and logic gate primitives, and allows new ones to be defined with truth tables.

Verilog的增加晶体管和逻辑门元，并允许新的界定与事实表。

In a logic gate arrangement, each of the MOSFETs works like a switch.

在逻辑门电路的排列中，每一个金属氧化物半导体场效应晶体管就像一个开关一样工作。

C on the biased voltages of the inorganic/organic static induction transistor through a normalized approach in the low-current regime is presented.

本文利用归一化方法归纳出无机和有机型静电感应晶体管SIT/OSIT在低电流区沟道势垒高度Φc与所加偏压的指数关系Φc =η*VGSexp+VSbi。

In chapter six, the application of higher order statistics in detection low-frequency noise of transistor is discussed.

第六章研究了高阶统计量在晶体管低频噪声检测中的应用。

On the other hand, when mains fails, the base of transistor T2 becomes low and it conducts.

另一方面，当电源发生故障，T2的基晶体管变得很低，它的行为。

A transistor memory cell can be made with any number of terminals.

晶体管存贮单元端点的数量是不受限制的。

This paper discusses design and realizable methods of remote test output interface from logical design angle.

本文从逻辑设计的角度讨论遥测输出接口的设计及实现方法。

This also 星体投射plies to buildings, structures and geological features.

这也适用于建筑物和地质特征。