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时钟脉冲

与 时钟脉冲 相关的网络例句 [注:此内容来源于网络,仅供参考]

On the leading edge of the next clock pulse, the contents of the first flip-flop is stored in the second flip-flop, and the signal which is present at the DATA input is stored in the first flip-flop, etc.

在下一个时钟脉冲的前沿,第一个触发器的内容被存放到第二个触发器中,而在数据输入端的信号则存放在第一个触发器中,依此类推。

Traditional integer division algorithm used many subtraction to achieve the operation,the process by spending a lot of clock pulse,but also the results of the operation did not deal with the last one bit.

摘 要:传统整数除法算法采用多次相减的方法来实现运算,相减的过程耗费了大量时钟脉冲,而且对运算结果的最后一位没有进行处理。

After the stop bit is received, the device will acknowledge the received byte by bringing the Data line low and generating one last clock pulse.

在收到停止位之后,设备将通过拉低数据线,生成最后一个时钟脉冲来应答收到的字节

This is done by the chain in the oscillator frequency plus or minus clock implementation.

这是通过在振荡器分频链上加、减时钟脉冲实现的。

However, the CMOS image sensors can provide stronger anti-radiation capacity than CCD as well as Single Chip Integrating with image sensors array, drive and control circuit, signal processing circuit, A/D conversion circuit and Completely Digital Interface Circuit. The CMOS image sensors also possess high quantum efficiency, wide spectral response, good response uniformity, low supply voltage and low request of clock. At the same time, the small bulk, high reliability, low power consumption and low cost are the prominent advantages of the CMOS image sensors too, thus CMOS image sensor has more exploiture foreground in X-ray real-time radioscopy imaging system.

由于CMOS 图像传感器比CCD 具有更强的抗辐射能力,还具有将图像传感器阵列、驱动和控制电路、信号处理电路、模数转换电路、全数字接口电路等实现单片集成以及量子效率高、光谱响应宽、响应均匀性好、工作电压低、对时钟脉冲要求低、体积小、重量轻、功耗低、高可靠、低成本等优点,因此在X 射线实时检测中更具有开发前景。

Via counting the input counter spot frequency clock pulse in the ultrasonic round-trip time,the measurement dis-tance is displayed.The algorithm is novel.

该数字式超声波测距仪对超声波从发射到返回的时间内输入到计数器特定频率的时钟脉冲进行计数,进而显示对应的测量距离。

Sequential logic circuits design can be rea lized with programming.Sequential circuit,Transition system,Flip-flop,Driving condition

该方法是由待设计系统的要求说明或系统的状态图,根据所选用的触发器,得到该触发器相应的状态变化条件,从而确定触发器的驱动条件和时钟脉冲,设计出所需要

In binary synchronous communication, the use of clock pulses to control synchron ''.

在二进制位同步通信中,使用时钟脉冲来控制数据和控制字符的同步。

In binary synchronous communication, the use of clock pulses to control synchron ization of data and control characters.

在二进制位同步通信中,使用时钟脉冲来控制数据和控制字符的同步。

But errors lies in the way of counter lead the bad measurement, especially when it needs high precision or the clock pulse is wider than the difference.

但是由于计数方法本身的误差,在测量精度要求比较高或是在鉴相脉宽小于用于计数的时钟脉冲周期时,原来的测量方法就无法满足实际的测量要求。

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