时钟周期

The two elementary working courses of phaselock loop, locking and tracing, are dissected,and the tracing condition is applied to the on the spot diagnosis of malfunctional gears in a gearbox .

将该技术的跟踪工作状态运用于齿轮箱故障诊断，在锁相环路输出信号的一个周期内发出一定数量的脉冲作为时域平均处理的外采样时钟，消除了转速不均的影响。

A topdown design of an 8bit RISC MCU is presented, in order to overcome the limitation of MCS51 microcontroller The core is based on Harvard architecture with 16bit instruction length and 8bit data length The performance of the MCU has been greatly improved by introducing singleclockcycle instructions, setting multiple highspeed working registers, replacing microprogram with direct logic block, etc FPGA verification and computer simulation show that its maximum clock frequency and instruction e...

在对传统的MCS51系列单片微控制器的局限性进行分析的基础上，设计了一种基于增强8位RISC构架的微控制器内核。该MCU核采用哈佛结构、16位指令字长和8位数据字长，通过设计单周期指令、在内部设置多个快速寄存器及采用硬布线逻辑代替微程序控制的方法，加快了微处理器的速度，提高了指令的执行效率。计算机仿真验证和FPGA仿真验证的结果表明，该MCU的最高时钟频率和指令执行效率等指标均优于MCS51的5倍以上。

6 Clocks per machine cycle operation.

6时钟每个机器周期的运作。

A single-ended clock input is used to control all internal conversion cycles.

采用一个单端时钟输入来控制所有内部转换周期。

Dual single-ended clock inputs are used to control all internal conversion cycles.

采用双单端时钟输入来控制所有内部转换周期。

A memory device includes: a generator system having a number of generators that supply voltage or current to the memory device, a controller that supplies to the generator system a state control signal that commands the generators to be in an active state or a standby state, and a self-refresh oscillator that generates a self-refresh clock signal having a period suitable to refresh memory cells of the memory device.

存储装置包括：具有多个发生器的发生器系统，所述多个发生器被配置来给所述存储装置提供电压或电流；给所述发生器系统提供状态控制信号的控制器，所述状态控制信号命令所述发生器处于激活状态或备用状态；以及自刷新振荡器，该自刷新振荡器生成具有适于刷新所述存储装置的存储单元的周期的自刷新时钟信号。

C Supports both Firmware Hub and LPC Memory Read and Write Cycles Auto-detection of FWH and LPC Memory Cycles C Can Be Used as FWH for Intel 8xx, E7xxx, and E8xxx Series Chipsets C Can Be Used as LPC Flash for Non-Intel Chipsets Flexible, Optimized Sectoring for BIOS Applications C 16-Kbyte Top Boot Sector, Two 8-Kbyte Sectors, One 32-Kbyte Sector, Three 64-Kbyte Sectors C Or Memory Array Can Be Divided Into Four Uniform 64-Kbyte Sectors for Erasing Two Configurable Interfaces C FWH/LPC Interface for In-System Operation C Address/Address Multiplexed Interface for Programming during Manufacturing FWH/LPC Interface C Operates with the 33 MHz PCI Bus Clock C 5-signal Communication Interface Supporting Byte Reads and Writes C Two Hardware Write Protect Pins: TBL for Top Boot Sector and WP for All Other Sectors C Five General-purpose Input Pins for System Design Flexibility C Identification Pins for Multiple Device Selection C Sector Locking Registers for Individual Sector Read and Write Protection A/A Mux Interface C 11-pin Multiplexed Address and 8-pin Data Interface C Facilitates Fast In-System or Out-of-System Programming Single Voltage Operation C 3.0V to 3.6V Supply Voltage for Read and Write Operations Industry-Standard Package Options C 32-lead PLCC C 40-lead TSOP

0第0页，本页显示记录0-0，共0条记录分0页显示C支持两种固件中心和LPC内存读取和写入周期自动的FWH和LPC的记忆圈C检测可以用于英特尔8xx系列，E7xxx，E8xxx系列芯片组和C可以用作FWH与至于非英特尔芯片组的BIOS应用柔性优化扇区开放16字节热门引导扇区，两个8 - Kbyte的，一个32字节部门，3个64 - Kbyte的C或存储阵列，线性预测编码闪光可分为四个统一为两个可配置的接口擦除的FWH / LPC接口为64 - Kbyte的行业，系统运行C地址/地址多路复用在制造过程中用于编程接口的FWH /线性预测编码界面C与33 MHz的PCI总线时钟 5信号通信接口进行操作，支持字节读取和写入引导扇区的顶部和WP C两硬件写保护引脚：任务型为所有其他部门 5个通用输入的系统设计的灵活性识别的多种设备选型部门登记销锁定为个别部门读取和写保护的A /阿复用界面C 11引脚复用引脚地址和8引脚的数据界面C促进快速系统内或外的系统编程的单电压3.0V至3.6V的操作供应的读取和写入操作业界标准的封装选项电压 32 -引脚PLCC 40引脚的TSOP

Normally the two timers are in step, and the external cues tend to regularise the internal clocks to the more convenient 24 hour period.

正常情况下两个定时系统是同步的，外部的信号会将体内时钟调节到更方便的24小时周期。

Normally the two timers are in step , and the external cues tend to regularise the internal clocks to the more convenient 24 hour period.

一般情况下，这两种定时器是步调一致的。外部信号常常调节人体时钟命使之达到更为便利的24小时周期。

Normally the two timers are in step, and the external cues te nd to regularise the internal clocks to the more convenient 24 hour peri od.

正常情况下两个定时系统是同步的，外部的信号会将体内时钟调节到更方便的24小时周期。

As she looked at Warrington's manly face, and dark, melancholy eyes, she had settled in her mind that he must have been the victim of an unhappy attachment.

每逢看到沃林顿那刚毅的脸，那乌黑、忧郁的眼睛，她便会相信，他一定作过不幸的爱情的受害者。

Maybe they'll disappear into a pothole.

也许他们将在壶穴里消失