数据输入输出

Fully Integrated Clock Recovery and Data Retiming Power Dissipation: 260mW with +3.3V Supply Clock Jitter Generation: 5mUIRMS Exceeds ANSI, ITU, and Bellcore SDH/SONET Jitter Specifications Differential Input Range: 50mVP-P to 1.6VP-P Single +3.3V Power Supply PLL Fast Track Mode Available Clock Output Can Be Disabled Input Data Rate: 2.488Gbps or 2.67Gbps Selectable Output Amplitude Tolerates 2000 Consecutive Identical Digits Loss-of-Lock Indicator Differential CML Data and Clock Outputs Operating Temperature Range:-40C to +85C

1第1页，本页显示记录1-5，共5条记录分1页显示完全集成的时钟恢复和数据重定时功耗：+3.3 V电源与时钟抖动产生：5mUIRMS超越美国ANSI，ITU和Bellcore实验室的SDH / SONET抖动规格差分输入范围：50mVP磷260mW至1.6VP - P的单+3.3 V供电锁相环快车道时钟输出模式下可用可以禁用输入数据速率：2.488Gbps或2.67Gbps可选输出振幅2000年连续容忍同位数丢失锁指示灯差分CML数据和时钟输出工作温度范围：-40℃至+85

Using sensor output data as the compensator input, and the sensor input data as the compensator output, the compensator is designed based on the nonlinear dynamic Laguerre function.

用传感器的输出数据作为补偿器的输入，传感器的输入数据作为补偿器的输出，进行基于Laguerre函数的非线性动态补偿器的设计研究。

Based on them, this paper proposes evaluation indexof fund performance from the aspect of finance, investor and interiormanagement. Considering the limitation of data envelopment analysis approach usedto evaluate fund performance, such as conventional DEA models can not considerinputs and outputs of evaluation units simultaneously, and an input-oriented DEAmodel and output-oriented DEA model often produce different evaluation results,this paper proposes a general form of DEA model which is input- andoutput-oriented by using multi-objective optimization and fuzzy set theory. Sincethe general form of DEA model can be transformed into a conventional input oroutput oriented DEA model by using special membership functions, it can beseemed as a nature extense of conventional DEA models, and a conventionalmodel can be regarded as a special case of DEA mdoel with general form.

针对现有基金绩效评价方法中较具优越性的数据包络分析方法的不足，如传统DEA模型不能同时综合考虑评价单元的输入和输出，以及分别采用面向输入和面向输出DEA模型评价基金绩效时，常常出现不一致的评价结果等，本文以多目标优化与模糊集合理论为工具，提出了一种能够同时面向输入和输出的DEA一般形式模型，并通过选择一些特殊的模糊集合隶属函数，使得这种DEA一般形式模型成为传统DEA模型的自然推广，而传统DEA模型是该模型的特殊形式。

Cases are not required to use input data or to supply output data, but if any one case outputs a value to a tunnel, all must output a value (unless Use Default If Unwired, which we will discuss in a moment, is enabled from the pop-up menu of the output tunnel).

分支亦不是必须要求使用输入数据或供给输出数据的，但是如果任何一个分支输出一个数值给一个隧道，那就要求所有的分支都要输出数值(除非激活了Use Default If Unwired，这将在后面讨论，从输出隧道的弹出菜单激活该功能)。

MAX1999EEI Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

MAX1999EEI引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S配对样本的支持下，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/遥测分比率为背景的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口的软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

TDA4864 Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

TDA4864引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S样本对支持，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/分比率背景遥测的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

Then the algorithm was used to get the seven parameters of viscosity model of W-Ni-Fe heavy alloy and 316L stainless steel feedstock, which provide the necessary material data for quality forecast of mold core part made of stainless steel and heavy alloy tungsten ball, and for optimal design of mold and process parameters, which establishes the foundation of material database of MIM. In the research of visual simulation software development, in order to build the software system model and flow analysis algorithm based on Cross-WLF viscosity model, and realize functions such as pre-processor, solver, parameter regress, data management, graph operations, some advanced software methods as OOSE (Object Oriented Software Engineering) and UML were applied to set up user model, static model and dynamic model of MIM simulation software. These models describe system function, event flow, structure and relation of classes, object interaction, structure of database and I/O file format.

在MIM可视化仿真软件开发方面，为了建立软件系统模型及基于Cross-WLF粘度模型的流动分析算法，实现软件的前处理、求解器、参数拟合、数据管理和图形操作等功能，将面向对象软件工程与统一建模语言技术首次引入到MIM仿真软件的设计开发中，建立了软件的用户模型、静态模型和动态模型，描述了系统的功能需求、事件流程、类的结构与关系、对象之间的通信、数据库结构和输入输出文件格式等，用Visual C++与Delphi开发工具编码实现了2维MIM充模流动过程仿真软件，方便了对薄壁零件的质量预测以及模具和工艺参数的优化设计。

The system implemented forest fire model selection automatically and intelligently. BP artificial neural network model of forest fire model selection was build by treating forest fire environment data as inputting variable and treating appropriate forest fire model as outputting variable. At the same time, we studied the methods of acquiring and calculating data of inputting and outputting. The system implemented machine of model selection automatically based on dynamic data driven technology. We selected 72 items experimental data from historical forest fire records in Beijing to experiment and confirm the validity of model selection. It turned out that the reliability of model selection is more than 80 percent.

3基于BP人工神经网络方法设计了林火模型适宜性选择技术框架结构，通过神经网络形成林火模型选择知识，实现了林火模型的自动化和智能化选择；以火场环境因子为输入变量，以适宜火场环境模拟的林火蔓延模型作为输出变量，构建了林火模型选择神经网络模型；研究了输入、输出因子数据的获取与计算方式，实现了动态数据驱动的林火模型自动选择机制；以本京市为例，选择了有详细火场情况记录的72场林火作为实验样本，其中60条记录作为学习样本集，12条记录作为验证样本，对神经网络进行了学习和验证，实验结果表明，模型选择精度可达到80%以上。

In this paper a method of using input - output sequences in a real system to identify a constant, multi-variable and stochastic linear system having unknown dimensions, system matrices and noise covariances is developed.

本文提出了利用实际系统的输入—输出试验数据，辨识具有未知维、参数阵和噪声协方差阵的定常、多变量、随机线性系统的方法。

An image display apparatus includes a display having data holding function, a vertical drive circuit sequentially and selectively scanning matrix form display elements, and a horizontal drive circuit writing a voltage among binary voltage preliminarily assigned depending upon the digital data of the image signal. The horizontal drive circuit and the vertical drive circuit are operated for performing selective scan of respective display element for at least m times in one frame period. The vertical drive circuit is constituted of n number of sequence circuits and logic operation circuits for outputs of the sequence circuits, where n is smaller than m, a period from inputting to the sequence circuit to outputting from the final stage being less than or equal to half of one frame period, and at least one of the sequence circuits being used with selectively inputting a plurality of inputs.

提供了一种图象显示器，其具有显示部，在矩阵上排列的象素内保有数据保持的功能，根据保持的数据进行显示；垂直驱动电路，对构成显示部的矩阵状显示器以每行按顺序作选择性扫描；以及水平驱动电路，对于由垂直驱动电路选择的行显示器件，根据应显示的图象信号数字数据，从预先分配的二进制电压中写入电压，并利用水平、垂直驱动电路，与应显示的图象信号同步，在1帧期间至少m次对各显示象素进行选择性操作，以此进行多色调显示，垂直驱动电路由满足n＜m的n个顺序电路和其输出的逻辑运算电路组成，顺序电路的输入从最后级输出为止的期间为1帧期间的1/2以下，并且，n个顺序电路的至少一个的输入是切换多个输入系统而使用。

This brought fixed cost, but it also is meant at the same time use a source to won't make you singlehanded assume a problem.

这带来了一定的成本，但它同时也意味着使用开源不会让你独力承担问题。

He gained a small fortune in real estate.

他在房地产上发了一笔小财。