数位电路

A combinational circuit that has three inputs that are an augend, D, an addend, E, and carry digit transferred from another digit place, F, and two outputs that are a ''.

一种组合电路，有三个输入端和两个输出端；三个输入端是：被加数d、加数e以及从另一个数位传来的进位数f；两个输出端是：无进位和数t及新的进位数r。

A combinational circuit that has three inputs that are an augend, D, an addend, E, and carry digit transferred from another digit place, F, and two outputs that are a sum without carry, T, and a new carry digit, R, and in which the outputs are related to the inputs according to the following table.

一种组合电路，有三个输入端和两个输出端；三个输入端是：被加数d、加数e以及从另一个数位传来的进位数f；两个输出端是：无进位和数t及新的进位数r。电路的输出和输入的关系如下表所示

This thesis proposes a high-speed analog-to-digital converter and its calibration circuit.

在这篇论文中包含了两个主题，高速类比数位转换器以及其校正电路。

In order to application on high resolution of liquid crystal display, which must reduce differential error voltage in digital-to-analog converter circuit. So, how to reduce the offset voltage of buffer amplifier is important. In the second buffer amplifier circuit, to promote the open-loop gain to reduce offset voltage.

若要使液晶显示器的色彩深度能够大幅提升，就必须采用位元数较高的数位类比转换电路，也就表示其输出的每一灰阶类比电压值的差将会随著位元数的增加而变小，因此输出缓冲放大器的偏移电压就显的特别重要。

Capacitive sensor circuit, in general, consists a capacitance to voltage converter and an analog to digital converter.

一般而言，电容式感测器电路包含著一个电容电压转换器与类比数位转换器。

The course provides the fundamental concepts used in the design of digital systems, including the methodology to design the combinational and sequential circuits with Boolean Algebra, Karnaugh map, and the logic elements, such as basic logic gates, latches, and flip-flops,etc.

本课程在提供数位系统设计所须具备的基础能力，包括学习以布林代数、卡诺图来设计组合逻辑与序向逻辑电路的方法，以及培养基础逻辑元件的应用能力，包括基本逻辑闸、栓锁器、与正反器等等元件。

For the first time, we propose the novel Wrapped-Select Gate SONOS memory with split-control gate in NAND architecture. The memory process is not only simple but also compatible with embedded non-volatile memory in conventional standard logic CMOS products. In this thesis, we demonstrate the physical mechanism and elimination of 2nd bit effect in 2 bit/cell operation.

我们提出一种新颖的分离式闸极结构於含有隐藏式选择性闸极之半导体─氧化层─氮化矽─氧化层─半导体记忆体元件於NAND电路阵列结构上，此记忆体元件不仅制程简单也能符合一般数位逻辑CMOS产品中的嵌入式非挥发性记忆体应用。

The DSP engine provides a highly integrated solution and no process variations for the polar system.

此方法在极座标系统下提供了一个具有高度数位整合且无制程漂移影响的电路设计。

Analog part includes sample and hold circuit, current comparator and digital analog convert.

类比部份为：取样保持电路、电流比较器、数位类比转换器。

This system mainly contains the front-end pulse interception and back-end software analysis. In the first part, we used a non-invasive infrared measurement method based on the dual channel simultaneous measurement technique. We measured the photo-plethysmograph from the subject's fingers and toes simultaneously, then used an analog circuit and central control unit to process the signals. Finally, the digital volume pulse data is processed by a personal computer. Because the characteristic points of digital volume pulse always occur in sharp variations, this paper proposes two algorithms to solve this problem. First, we find the pacemaker and percussion wave peak from transient slope variation, and then locate the dicrotic notch and dicrotic wave peak by using the wavelet transformation algorithm. When we analyze the data, we use the Visual Basic graphical user interface, which together with the Matlab is the core of the system.

本系统主要包含前端脉波撷取及后端软体分析两部分，其中前端脉波撷取部份是以非侵入式的红外线量测方式，双通道同步量测受测者手指与脚趾的光容积变化描记图，同时将此讯号经类比处理电路及中央控制单元输出成为数位容积波，再传送至个人电脑中；而在后端软体分析部份，因数位容积波之特徵点皆出现於波形中急剧变化的部份，故本论文以瞬间斜率变化量来定位脉波讯号中的起搏点及主波峰顶点，并利用小波转换演算法（wavelet transformation algorithm）来分析重搏切迹与重搏波顶点；程式撰写主要以Matlab为核心，结合Visual Basic的图形化使用者操作介面，增加系统与使用者间的亲和力。

For a big chunk of credit-card losses; the number of filings (and thus charge-off rates) would be rising again, whether

年美国个人破产法的一个改动使得破产登记急速下降，而后引起了信用卡大规模的亏损。

Eph. 4:23 And that you be renewed in the spirit of your mind

弗四23 而在你们心思的灵里得以更新