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延迟电路

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Through a flip-flop, monostable or amplifying circuit composed of a CMOS element, the electromotive force controls the on and off, the delaying or the instantaneous on and off of the load.

通过啪嗒啪嗒的响声,单稳态或放大的电路组成由CMOS元素,电动力控制断断续续,延迟或者断断续续瞬间装载。

A DPC ( 300 ) includes: a frequency source ( 310 ) for generating a clock signal; a delay line ( 320 ) for receiving the clock signal and generating phase-shifted clock signals at output taps; a digital control device ( 330 ) for generating a control signal; and a windowing and selection circuit for generating the output signal, that includes sequential logic devices ( 500, 510, 520 ) and a combining network.

DPC(300)包括:频率源(310),用于产生时钟信号;延迟线(320),用于接收时钟信号并在输出抽头产生相移时钟信号;数字控制器件(330),用于产生控制信号;以及开窗口与选择电路,用于产生输出信号,包括:时序逻辑器件(500、510、520)和组合网络。

A circuit for detecting the phase angle of a three-phase alternating current includes a plurality of low-pass filters, a plurality of multipliers, a subtracter, a loop filter, an integrator, and a phase delay compensator installed between the subtracter and the loop filter, for compensating for phase delay of the input signal caused by the low-pass filters.

一种检测三相交流电相位角的电路,包括:若干个低通滤波器;若干个乘法器;一个减法器;一个环路滤波器;一个积分器;和安装在减法器与环路滤波器之间的相位延迟补偿器。

In this paper, a novel voltage hysteretic comparator with adjustable delay time is designed and simulated. This circuit can be realized in BCD(Bipolar-CMOS-DMOS) technology.

文章提出一种延迟时间可调的新型电压迟滞比较器设计,电路在1.5μm BCD(Bipolar-CMOS-DMOS)工艺下实现。

The results show that the propagation delay is less than 1ns, the ratio of input and output impedance is up to 10〓, realizing a little insert dissipation at high-speed operation, laying a solid foundation for the materialization of high-resolution one-way analog switch A/D converter. 2. A new structure of the high-speed CMOS voltage comparator circuit for the improved nonoffset cancel circuit, which can satisfy the needs of the 8-bit linearity.

模拟结果表明,基于CMOS工艺实现的BiCMOS单向模拟开关的传播延迟小于1ns,开关的输入输出阻抗比高达10〓以上,实现了高速工作下的极小插入损耗,为实现高精度单向隔离模拟开关分步法A/D转换器奠定了基础; 2、基于满足八位线性要求的前提,本文提出了一种改进的无失调取消电路的高速CMOS电压比较器新结构。

Based on the HSPICE simulations, the proposed trigger has full swing, no static current. And it's transmission delay has little influence by load captance. With these characteristics, this circuit is very suitable for lower voltage and low power, high speed applications.

该电路采用0.6μm的CMOS工艺设计,并通过HSPICE验证,表明这种施密特触发器具有全摆幅输出、几乎不存在静态功耗、传输延迟几乎与负载无关等优点,比较适合在低电压、低功耗、高速便携设备中应用。

Propagational delay of the bus switch when used in a system is determined by the driving circuit on the driving side of the switch and its interaction with the load on the driven side.

Propagational延迟开关时,巴士在一个系统中使用,是由开关的驱动侧及其与驱动端上的负载驱动电路的相互作用决定的。

RN1406 Pinout: RCDs digital delay lines have been designed to provide precise tap delays with all the necessary drive and pick-off circuitry.

RN1406引脚说明:刚果民盟数字延迟线的设计提供所有必要的驱动器精确自来水延误和挑选过的电路。

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