射极电流

In comparison with the switches based on other polytypes of SiC, the design benefits from having fewer lattice mismatches between the SiCGe and 3C-SiC. A maximum common emitter current gain of about 890 and superb light-activation characteristics may be achievable. The performance simulation demonstrates that the device has a good I-V characteristic with a turn-on voltage knee of about 4V.

结果表明，与采用其他结晶类型的碳化硅衬底相比，SiCGe与3C-SiC间较小的晶格失配有利于提高器件性能，可使其最大共射极电流增益达到890，获得最好的光触发特性和较好的I-V特性，饱和压降大约为4V。

It is shown that the maximum controllable current depends on the design of the current gain and emitter-shorted current.

结果表明，耦合晶体管电流放大系数及晶闸管射极短路电流的设计决定了器件的最大可关断电流。

From our measurement data, we find that the current gain is influenced by emitter size effect.

依量测结果可知，电流增益会受到射极尺吋效应的影响。

In the power supply circuit, series power supply and the adjustment of the series load, the load current flows through all of the adjustments, and transistors Guozainaili worse, once output overload or short circuit, the input voltage increases in the full set of adjustment an emitter, the current surge to adjust the fierce heat, if not over-current protection measures at this time, the adjustment will be burned, power Zhengliuguan also will be greatly threatened or damaged.

中文摘要：在稳压电源电路中，串联型稳压电源的调整管与负载串联，负载电流全部流经调整管，而晶体管的过载能力较差，一旦输出端过载或短路，输入电压全部加在调整管集---射极间，其电流剧增，使调整管猛烈发热，如果此时没有过流保护措施，调整管就要被烧坏，电源整流管也将受到巨大威胁或损坏。

In contrast, if the emitter ledge is too thin, it may not effectively passivate the surface.

相对的，假如射极突出部太薄，将无法有效抑制表面复合电流。

If the emitter ledge is too thick, current will flow through the undepleted ledge, which increases the emitter-size effect.

假如，射极突出部太厚，电流将会沿著未完全空乏的路径，横向扩散至未保护且裸露之基极表面区域，衍生非理想之大量表面复合电流。

Voltage Source and Current Source, Thevenin Theory, Trouble Shooting, Characteristic Curve of Diode, Diode Models, Rectifier Circuits, Input Filtering Capacitor, Voltage Multiplier Circuits, Limiter and Clipper Circuits, DC Clampers and Peak-to-peak Detectors, Zener Diode, Zener Diode Rectifier, Photoelectric Devices, Collector-Emitter Junction, Transistor Characteristics of common-emitter, Base Bias, LED Dirver, Establishing a Stable Q-point, PNP Transistor Biasing, Transistor Biasing, Coupling and By-Pass Capacitors, AC Emitter Resistance, Common-Emitter Amplifier, Other Common-Emitter Amplifiers, Cascaded Common-Emitter Amplifiers, AC Load Line, Emitter Follower, Class B Push-pull Amplifiers, JFET Characteristic Curve, JFET Biasing, JFET Amplifier, VMOS Circuit, Differential Amplifier, Operational Amplifier, Non-inverting Feedback, Negative Feedback.

电子学实验( S0704)(1，1)/应用电子学实验( S0472)(1，1)电压源和电流源、戴维宁定理、故障排除、二极体特性曲线、二极体近似模型、整流电路、电容-输入型滤波器、倍压电路、限制器电路和峰值检测电路、直流定位器与峰对峰检测器、齐纳二极体、齐纳二极体整流器、光电元件、集射极接面、集极特性曲线、基极偏压、LED驱动器、建立一个稳定的工作点 Q 、 PNP 电晶体偏压、电晶体偏压、耦合及旁路电容、交流射极电阻、共射极放大器、其他 CE 放大器、串接共射极放大器、交流负载线、射极随耦器、 B 类推挽式放大器、 JFET 特性曲线、 JFET 偏压、 JFET 放大器、 VMOS 电路、差动放大器、运算放大器、非反向电压回授、负回授。

This paper discusses design and realizable methods of remote test output interface from logical design angle.

本文从逻辑设计的角度讨论遥测输出接口的设计及实现方法。

This also 星体投射plies to buildings, structures and geological features.

这也适用于建筑物和地质特征。