寄存器

The train positioning technology based on absolute position encoding is proposed. The absolute positions of the rail track are encoded with the m sequence. The biconditional markers placed on the rail track are detected sequentially by the train-borne reader. The exclusive position code consists of the binary information in the shift register. The absolute train positioning information can be extracted by decoding this position code.

利用m序列（最大周期线性反馈移位寄存器序列）对轨道线路上的绝对位置进行编码，当列车在线路上运行时，通过车载阅读器顺序检测设置在轨道线路上的二值标记，在不同位置上读到的标记在移位存储器中构成唯一的位置编码，以此位置编码值作为地址与车载阅读器所处位置的坐标信息相对应，就可以实现列车的绝对定位。

The shift register is a sequential logical circuit, which can store and shift binary digit information.

移位寄存器是用来寄存二进制数字信息，并能将存储的信息移位的时序逻辑电路。

The design of the special-purpose 32-bit floating-point RISC chip is a major project of the National Defense Science and Industry Committee of China during the 9th 5-year-plan. This paper studies the design of the datapath in the chip, including low-power design techniques, the design of barrel shifter, adder, incrementer, fixedpoint and floating-point ALU, fixed-point and floating multiplier, and register bank.

本文以国防科工委"九五"期间重点课题专用32位浮点RISC为对象研究了该芯片的数据路径设计，其内容包括低功耗设计技术、桶式移位器、加法器与增值器、浮点算逻部件、定浮点乘法器、寄存器组等的设计等。

Common uses for the PLD include chip selects for external devices, state-machines, simple shifters and counters, key- pad and control panel interfaces, clock dividers, handshake delay, multiplexers, etc. This elimi- nates the need for small external PLDs and logic devices.

为共同使用的PLD芯片包括外部设备选择，状态机，简单的移位寄存器和计数器，关键垫和控制面板接口，时钟分频器，握手延迟，多路复用器，等这隐去，纳茨为小和外部需求的PLD逻辑器件。

Ok ... now we have learned how to check the supported version number of the vertex shader hardware, how to declare a vertex shader and how to set the constants in the constant registers of a vertex shader unit.

好了。。。我们现在已经学会了如何检测系统支持的顶点着色器的版本号，如何宣告一个顶点着色器及如何在一个顶点着色单元内的常量寄存器中设置常量。

This PLC system is designed mainly by the simulationquantity input output module, the shift register, the conveyer, thetimer, the counter constitution, this system's major function ismeasuring all targets of every bottles ,qualitative or not , thenthe choices of qualified or not of the bottles were controlled byhand.

本次PLC系统设计主要是由模拟量输入输出模块、移位寄存器、传送器、定时器、计数器构成，系统的主要功能是对瓶子的各项指标合格与否进行检测，通过手动控制来实现对瓶子合格与否的选择。

The invention provides a dual redundant CAN bus controller, which is arranged on a crewel CAN bus, characterized in that: two CAN bus transceiving modules, two initializing modules are respectively corresponding to the CAN bus controller module A and CAN bus controller module B; the two CAN bus controller modules are respectively connected to the two CAN bus via a driver shifting control unit; the initializing module is connected to the bus control initializing register for initializing the e CAN bus controller modules; a protocol processing module is connected to the FIFO buffer; the FIFO buffer is connected to the node processor via the logical interface; a intermitting process unit sends the corresponding intermitting control signal to the CAN bus transceiving modules according to the CAN bus controller modules; one path of the CAN bus controller module is directly connected to the protocol processing module; another path is connected to the protocol processing module via the bus receiving buffer.

本发明提供了一种双冗余CAN总线控制器，设置于双线CAN总线上，其特征在于：两个CAN总线收发模块、两个初始化模块分别与CAN总线控制器模块A和CAN总线控制器模块B相对应；两个CAN总线控制器模块通过驱动器切换控制单元分别与两条CAN总线相连；初始化模块与总线控制器初始化寄存器相连，对所对应的CAN总线控制器模块进行初始化；协议处理模块与FIFO缓存器相连；FIFO缓存器通过逻辑接口与节点处理器连接；中断处理单元根据CAN总线控制器模块的控制命令对CAN总线收发模块发出相应的中断控制信号；CAN总线收发模块一路与协议处理模块直接相连，另一路通过总线接收缓存器与协议处理模块相连。

This process is called register allocation and is one of the most important optimisations on all architectures, but it is even more important on the Intel architecture because of the low number of available registers.

这个处理叫做寄存器分配，它是所有体系结构中最重要的优化之一。因为寄存器数量很少，因此在 Intel 体系结构中它显得很重要。

Before making any timing to evaluate the effect of the two optimisations it is a good idea to optimise away some, or all if possible, of the stack to register and register to stack moves.

在比较这两个优化的效率之前，最好能尽可能的优化掉比如堆栈到寄存器，寄存器到堆栈的数据移动。

Therefore, in setting up the correspondence between register and location values, we can safely ignore those registers that are dead at the current point l.

所以，在设定寄存器及其分配单元之间的对应关系时，我们可以安全地忽略当前点l的所有非活跃寄存器。

With Death guitarist Schuldiner adopting vocal duties, the band made a major impact on the scene.

随着死亡的吉他手Schuldiner接受主唱的职务，乐队在现实中树立了重要的影响。

But he could still end up breakfasting on Swiss-government issue muesli because all six are accused of nicking around 45 million pounds they should have paid to FIFA.

不过他最后仍有可能沦为瑞士政府&议事餐桌&上的一道早餐，因为这所有六个人都被指控把本应支付给国际足联的大约4500万英镑骗了个精光。