寄存器

It is up to the handlers to filter spurious invocations, such as by reading a registry on their devices.

这就等于让句柄去过滤欺骗的行为，例如在他们的设备上读一个寄存器。

A transfer from a Data Register to a WCR is essentially a write to a static RAM.

从一个数据寄存器传输到西铁基本上是一个静态RAM写。

The Strip-Mining technique is significant for improving SRF bandwidth utilization on the stream processor.

长流分段是提高流处理器上流寄存器文件(stream register file，简称SRF)带宽利用率的重要途径之一。

Thirdly, proper probabilistic model is built for the bilateral stop-and-go generator and the probability properties of its output sequence are studied. It is proved that the output sequence obey strong law of large numbers and central limit theorem and that, however, the distributions of 0 and 1 in the output sequence are imbalanced, which implies that this generator cannot be used as keystream generator directly. The rate of coincidence between the output sequence and corresponding LFSR sequences, together with their first derivatives are obtained, which reveal the existence of correlation between these sequences.

最后，建立了双侧停走生成器的概率模型，研究了双侧停走生成器输出序列的概率分布性质和大数性质，证明了生成器输出序列服从强大数定律和中心极限定理，得到了生成器输出序列中0，1分布是不平衡的结论，由此指出不能将这种生成器直接作为密钥流生成器；给出了双侧停走生成器输出序列和相应的线性移位寄存器序列之间的符合率以及一阶差分序列之间的符合率，得到了符合率的表达式，揭示了这些序列的对应比特和对应序列段之间存在相关性。

In the digital control module of the circuit, design the successive approximation logic which based on the ring counter/shift register.

在数字控制模块的电路实现中，用基于环形计数器和移位寄存器的结构设计了逐次逼近逻辑电路。

The coarse tuning structure is composed of two digital modules, including a successive approximation register and a frequency comparator with a novel structure.

该粗调环路由数字电路设计实现，包含逐次逼近寄存器和新结构的频率比较单元两个模块。

This paper proposed a Superblock based dynamic data prefetching scheme for dynamic translation, it used software instrumentation to collect program's load delay information and built Superblocks. Then performed the data flow analysis on Superblocks to generate the RDUG. After that, inserted data prefetching instructions for the delinquent loads.

基于超级块的动态数据预取优化采用软件插桩方式收集应用程序的load访存延迟信息并构造Superblock；然后根据延迟信息以及Superblock数据流分析得出的寄存器定值引用关系，对延迟load指令进行预取优化。

This paper proposes a SuperBlock based dynamic data prefetching scheme for dynamic translation, it uses software instrumentation to collect program's load delay information and build SuperBlocks. Then the data flow analysis is performed on SuperBlocks to generate the RDUG. After that, data prefetching instructions are inserted for the delinquent loads.

基于超级块的动态数据预取优化采用软件插桩方式收集应用程序的Load访存延迟信息并构造SuperBlock，然后根据延迟信息以及SuperBlock数据流分析得出的寄存器定值引用关系，对延迟Load指令进行预取优化。

This can be achieved by using pre-indexed addressing with auto-indexing, and allows the program to walk through a table of values

可以使用带有自动变址的前变址寻址来实现对基址寄存器的修改，这样可么让程序追踪一个数据表，即

Data can be supplied either by the vertex buffer or by the primitive tessellation engine.

一开始，输入寄存器的编号和其功能之间没有严格的对应关系，比如某个顶点的坐标既可以被载入v0，也可以被载入v15。

In the United States, chronic alcoholism and hepatitis C are the most common ones.

在美国，慢性酒精中毒，肝炎是最常见的。

If you have any questions, you can contact me anytime.

如果有任何问题，你可以随时联系我。