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When the processor wants to read thecontents of a memory location or register within a particular peripheral, ints on the data bus.

当一个处理器想去写某一特定外设中的存储器地址或寄存器中的内容时,处理器设置地址总线并在数据总线上接收内容。

The address bus is used by the pro cessor to select aspecific memory location or register within a particular peripheral.

地址总线被处理器用来选择在特定外设中的存储器地址或寄存器

When metastability occurs the clock-to-out time can be extended beyond the register's nominal tCO time.

当亚稳态发生时,clock-to-out时间可能会延伸并超出寄存器名义上的tCO时间。

When metastability occurs the clock-to-out time can be extended beyond the register's nominal tCO time. The additional time beyond the tCO time for the output signal to settle to a known state is known as the settling time. The tMET of a synchronization register chain is the sum of all output slacks of the registers in the chain.

对于这段话,我的理解是: tMET 时间和 tCO 时间之和就是异步时钟域的亚稳态时间,如果这个时间大于目的时钟域的同步寄存器链的时序余量(大概是时钟周期减去它的建立时间和保持时间之和吧),那么这时候系统采到的信号一定是亚稳态。

Given multi-clock domain systems integrated in the single chip,the number of asynchronous greatly increased, the metastability has increasingly important effects on the reliability of the PLDs.

在用P L D实现同步数字系统设计时,如果所有模块共用同一个时钟信号,系统中所有的寄存器都由该时钟的边沿来触发,这样的时钟设计·2006第02期·ELECTRONICS QUALITY可以使整个设计流程易于处理,顺利实现综合、布局布线到静态时序分析。

This design applies the Top-Down design method and the modularization idea to the programming of CPU. Additionally, this paper explains the implementation of registers, ALU, the instruction decoders modular and the microinstruction generation modular in details.

本设计采用了自顶向下的设计方法和模块化的设计思想,编写了处理器的代码,并具体阐述了寄存器,算术逻辑器件,指令译码模块,微指令形成模块的实现细节。

Create the next microinstruction's address in the micro address register usually indicated in the address part of a microinstruction, to prepare for fetching the next microinstruction, in this case, the micro address keep the microinstructions in a micro program being executed sequentially.

产生微住址通常在微指令的住址部份中被指出的寄存器的下一个微指令住址,准备动人的下一个微指令,在这情况,微住址保存一个被继续地运行的微计画的微指令。没有发枝的

A topdown design of an 8bit RISC MCU is presented, in order to overcome the limitation of MCS51 microcontroller The core is based on Harvard architecture with 16bit instruction length and 8bit data length The performance of the MCU has been greatly improved by introducing singleclockcycle instructions, setting multiple highspeed working registers, replacing microprogram with direct logic block, etc FPGA verification and computer simulation show that its maximum clock frequency and instruction e...

在对传统的MCS51系列单片微控制器的局限性进行分析的基础上,设计了一种基于增强8位RISC构架的微控制器内核。该MCU核采用哈佛结构、16位指令字长和8位数据字长,通过设计单周期指令、在内部设置多个快速寄存器及采用硬布线逻辑代替微程序控制的方法,加快了微处理器的速度,提高了指令的执行效率。计算机仿真验证和FPGA仿真验证的结果表明,该MCU的最高时钟频率和指令执行效率等指标均优于MCS51的5倍以上。

You have to manipulate the memory registers and write simplified yet brain-taxing mnemonics that only a hacker would enjoy.

你必须操纵内存寄存器,写简捷而脑征税助记符,只有黑客将享有。

A"bit-mismatch"squarer and a"digit-serial"polynomial multiplier have been designed for finite field arithmetic and the modular inverse in GF (2〓) can be calculated under the combination of the squarer and the multiplier. Based on the Montgomery method for the elliptic curve scalar multiplication, a new improved process has been put forward in the thesis.

论文改进了标量乘法Montgomery算法流程,利用寄存器间的数据交换,将0和1两种情况下的中间结果"点加一倍点"操作统一起来,简化了控制流程,使关键路径延时下降,而且减少了运算单元输入输出的连线逻辑。

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在美国,慢性酒精中毒,肝炎是最常见的。

If you have any questions, you can contact me anytime.

如果有任何问题,你可以随时联系我。

Very pretty, but the airport looks more fascinating The other party wisecracked.

很漂亮,不过停机坪更迷人。那人俏皮地答道。