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Graph coloring is a highly e?ective approach to globalregister allocation. In this paper, we should study priority-based register allocation, whichis a e?

常用的寄存器分配算法是被称作图染色的寄存器分配算法,本文所研究的基于优先级的寄存器分配就是图染色算法的一种。

There are several types of registers ,Including an instruction register , which holds the instruction being executed ,an address register, which holds the addresses of data to be processed ;a program register , which holds status information ; and an accumulator , which holds the results of the ALU's

寄存器有几种类型,包括指令寄存器,它含有将要被执行的指示,地址寄存器,它包含被处理的数据地址;程序寄存器,它包含程序的状态信息;还有累加器,它包含算术\逻辑运算单元的操作结果。

The execution environment described here includes memory, general purpose data registers, segment registers, the flag register, and the instruction pointer register.

此处描述的执行环境包括内存、通用目的数据寄存器、段寄存器、标志寄存器和指令指针寄存器。

TL084MJ Pinout: 3.3V Operation with 5V Tolerant Buffers ACPI 1.1, PC99/PC2001 Compliant LPC Interface with Clock Run Support Serial IRQ Interface Compatible with Serialized IRQ Support for PCI Systems 15 Direct IRQs Four 8-Bit DMA Channels ACPI SCI Interface nSMI Shadowed write only registers Internal 64K Flash ROM Programmed From Direct Parallel Interface, 8051, or LPC Host 2k-Byte Lockable Boot Block Can be Programmed Without 8051 Intervention Three Power Planes Low Standby Current in Sleep Mode Intelligent Auto Power Management for Super I/O ACPI Embedded Controller Interface Configuration Register Set Compatible with ISA Plug-and-Play Standard (Version 1.0a) High-Performance Embedded 8051 Keyboard and System Controller Provides System Power Management System Watch Dog Timer 8042 Style Host Interface Supports Interrupt and Polling Access 256 Bytes Data RAM On-Chip Memory-Mapped Control Registers Access to RTC and CMOS Registers Up to 16x8 Keyboard Scan Matrix Two 16 Bit Timer/Counters Integrated Full-Duplex Serial Port Interface Eleven 8051 Interrupt Sources Thirty-Two 8-Bit, Host/8051 Mailbox Registers Thirty-six Maskable Hardware Wake-Up Events Fast GATEA20

TL084MJ引脚说明: 3.3V工作电压为5V容错缓冲器的ACPI 1.1,PC99/PC2001符合LPC接口与时钟运行支持-兼容串行接口与串行的IRQ IRQ的支持PCI系统- 15直接的IRQ - 4个8位DMA通道- ACPI的SCI接口- nSMI -阴影只写寄存器内部的64K的Flash ROM -直接从程序并行接口,8051,还是LPC主机-的2K字节可锁定引导块-可在不干预程序8051三力飞机-低待机电流在休眠模式-智能型自动电源管理的超级I / O的ACPI嵌入式控制器接口配置寄存器设置兼容的ISA拆开的播放标准(版本1.0a)高性能嵌入式8051键盘和系统控制器-提供系统电源管理-系统监视狗定时器- 8042型主机接口-支持中断和轮询访问- 256字节数据RAM -片上存储器映射控制寄存器-获取实时时钟和CMOS寄存器-最多16x8矩阵键盘扫描- 2个16位定时器/计数器-综合全双工串行接口- 11个中断源8051 - 32个8位,Host/8051邮箱寄存器- 36个可屏蔽硬件唤醒事件-快速GATEA20

Thus, an instruction that is updating a floating point register can be renamed along with an instruction that is updating a general purpose register or vector multimedia extensions instructions register using the same rename structure because the number of architected states for GPR is the same as the number of architected states for FPR and VR.

因此,可以利用相同重命名结构将正在更新浮点寄存器的指令与正在更新通用寄存器或矢量多媒体扩展指令寄存器的指令一起重命名,因为用于GPR的架构化状态的数量与用于FPR和VR的架构化状态的数量相同。

The general timing counter applied in computer includes configuration register TCCFG control word register TCCON, state register TCSTA, initial value register TCPAL and internal counter TCCOUNTER. Both the said internal counter TCCOUNTER and the internal bus are in 32 bit width and the 32 bit read-out bus and 32 bit write-in bus are connected directly to the 32 bit internal bus. Therefore, the present invention has the advantages of long counting time, high precision and simple chip design and programming.

本发明公开了一种应用于计算机领域中的通用计时计数器,包括配置寄存器TCCFG、控制字寄存器TCCON、状态寄存器TCSTA、初值寄存器TCPVAL和内部计数器TCCOUNTER;所述的内部计数器TCCOUNTER和内部总线都是32位宽度,其32位的写入总线和读出总线都直接连到32位的内部总线上;从而克服了现有技术中计数时间短、编程和芯片设计复杂、计数精度低的缺点,使得计数时间长、精度高、芯片设计和编程简单。

In general,the code optimization and code-generation phases of a compiler,often referred to as the back end,may take multiple passes over the IR before generating the targer program.

如果需要使用一个寄存器但是这个寄存器存放其他变量,那么需要产生ST R,M来释放这个寄存器,这个过程称为register spill寄存器溢出

The paper detailedly introduces two methods of the regiseter renaming in X high-performance microprocessor, respectively implemented through register rotation and register stack, give an example to show how software pipelining supported by register rotation overcomes the disadvantage to code optimization induced by traditional unloop method, and furthermore implements the renaming design of general register, floating point register and predication register.

本文详细介绍X高性能微处理器中寄存器旋转和寄存器堆栈方式实现的寄存器重命名,举例说明寄存器旋转支持的软件流水技术如何克服传统循环展开方法给代码优化带来的弊端,并进一步给出通用、浮点和谓词寄存器重命名逻辑的具体实现。

For example, if a register isconnected to the data bus in an 8-bit machine. eachline of the bus connects to register.Because the databus will be an 8一bit bus, there are 8-bit Flip-flopsthat form the register, When there is information onthe data bus,and a particular register is selected toreceive data, all the Flip-flops will store data simultancously. This kind of register is refer is referred to as aparallel register.

例如,如果寄存器被联接到一台8位机的数据总线上,那么,该总线的每一条线均联接到寄存器上,因为数据总线是8位总线,所以有9个触发器来形成寄存器,当在数据总线上有信息,并且选择了一个特定的寄存器来接收数据时,那么所有的触发器将同时存储数据,这种形式的寄存器叫做&并行寄存器&。

In the past research, instruction clustering pay more attension on instruction parallelism, and pass the register pressure to register allocator. In this paper, the authors clustered instruction through runtime inspection of the register command pressure.

在以往的研究中,软件流水之前的指令分簇会更多地考虑指令并行性,往往会把寄存器的压力交给寄存器分配阶段,当物理寄存器不够分配时会造成寄存器溢出。

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