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BFG Ageia PhysX graphics accelerator card is the first Physics processor from BFG, which is among few manufacturers that are manufacturing and selling physics processors, the other vendor been ASUS.

bfg的Ageia物理图形加速器卡是首个物理处理器从bfg ,这是其中少数厂商是生产和销售的物理处理器,其他供应商被华硕。

In chapter Ⅴ, from the point of the system'view of the vibration data acquisitor for rotating machinery, the major—minor processor structure in this system is analysed, the characteristics of the major processor DSP56001, the function of the minor microcomputer PC have been explained. The Memory Spaces Configuration, Synchronous Serial Interface , Serial Communications Interface , Host— Port and Peripheral Buses of the DSP system are summarized, and its timing is explained. The DSP system interfaces with the boards have been explained further.

第Ⅴ章,从旋转机械振动数据采集器的系统出发,分析了该系统的主—次处理器结构,说明了主处理器DSP56001的特点及次微机PC的地位和作用;概述了DSP系统的存储器空间设置、同步串行接口、串行通讯接口、主接口和外设总线,并说明其工作时序;对DSP系统与各模块之间的接口关系,作了进一步的说明。

Processor scheduler:achieve processor schedule with priority number scheduling arithmetic.

处理器调度设计一个按优先数调度算法实现处理器调度的程序。

Shows how your processors handle arithmetic and floating point instructions in comparison to other typical processors.

显示您的处理器处理算法,相较于其他典型的处理器浮点指令。

For large scientific and engineering problem, an array processor might relieve the main processor of the time-consuming chore of array manipulation.

对一些庞大的科学和工程问题,一个阵列处理器可以把主处理器从耗费时间的向量处理的杂务中解脱出来

Our algorithms are based on the proces-sor arrays with a reconfigurable bus system that consists of a processor array and a reconfigurable bus system.

我们的演算法乃使用可重组态汇流排系统之处理器阵列,它含有一处理器阵列以及一可重组态汇流排系统。

A miniaturized uncooled infrared image processing system is designed by adopting the structure of Field Programmable Gate Array embedded with NiosⅡ processor instead of Digital Signal Processor +FPGA structure.

设计一个非制冷红外图像处理系统,该系统放弃了目前普遍应用的数字信号处理器+现场可编程门阵列的系统构架,采用基于FPGA的NiosⅡ嵌入式处理器的系统构架,实现了系统的小型化。

In this paper, we present an O time algorithm to solve the minimum circle-cover problem defined on circular-arc graphs based on the processor arrays with a reconfig-urable bus system which consist of a processor array and a reconfigurable bus system.

在本论文中,我们提出O(1)时间的演算法,以解决环弧图上最小覆盖圆的问题。我们的演算法乃使用可重组态汇流排系统之处理器阵列,它含有一处理器阵列以及一可重组态汇流排系统。

An array processor might relieve the main processor of the time-consuming chore of array manipulation.

改译:数组处理器可以使主处理器不必浪费许多时间去做处理数组的杂务。

34 Chapter 1 The History and Future of Computers 1.3 Near-future Supercomputer Directions The ASCI Purple system will use IBM's next generation microprocessor, the POWER5, employing a total of 12,544 of them.

这 12,544 个处理器将分布在196部单独的计算机之中。总内存带宽将是15 GB,等同于同时地 196部单独的计算机之中 15。个处理器将分布在196部单独的计算机之中。总内存带宽将是15.6GB,等同于同时地 31,200部DVD电影一条具有12 电影。

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However, as the name(read-only memory)implies, CD disks cannot be written onorchanged in any way.

然而,正如其名字所指出的那样,CD盘不能写,也不能用任何方式改变其内容。

Galvanizes steel pallet is mainly export which suits standard packing of European Union, the North America. galvanizes steel pallet is suitable to heavy rack. Pallet surface can design plate type, corrugated and the gap form, satisfies the different requirements.

镀锌钢托盘多用于出口,替代木托盘,免薰蒸,符合欧盟、北美各国对出口货物包装材料的法令要求;喷涂钢托盘适用于重载上货架之用,托盘表面根据需要制作成平板状、波纹状及间隔形式,满足不同的使用要求。

A single payment file can be uploaded from an ERP system to effect all pan-China RMB payments and overseas payments in all currencies.

付款指令文件可从您的 ERP 系统上传到我们的电子银行系统来只是国内及对海外各种币种付款。