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Results: In the 23 cases of disease group, 16 cases were unilateral and 7 cases were bilateral. X-ray examination showed local prominence between ischium and pubis in all cases. Lamellar changes of the bone inhomogeneous in density with round translucence were found in 8 cases accompanied with intact cortex. Mild osseous hyperplasia was found in 8 cases without changes of periosteum and soft tissues. CT examination of 8 cases presented with local prominence between iscbium and pubis, translucence, cataclasm, discontiguous osteal cortex with irregular ends, sclerotic medullary cavity of honey surroundings, but no sequestration and changes of periosteum and soft tissues. The above-mentiooed X-ray features appeared in 14 cases among normal group, bilateral in 3 cases.

结果:病变组23例中,16例为单侧,7例为双侧。X线表现为坐骨耻骨结合处局限性骨膨隆,8例有层状改变,病变区内密度不均,有类圆形低密度透光影,骨皮质完整,8例周围骨质轻度增生,未见骨膜反应和软组织改变。8例CT表现为坐骨耻骨结合处局部膨大,其内有低密度透光区,有碎裂,骨皮质连续性中断,断端边缘欠整齐,邻近的髓腔轻度硬化,无明显的死骨和骨膜反应,邻近的软组织正常;正常组中14例出现上述X线改变,其中3例为双侧性。

This paper introduced an eigen-mode decomposing method to decouple zero sequence parameter in double circuit. The decomposing matrix of eigen-mode component is given. The zero sequence component relationship between voltages or currents at two terminals of double circuit was achieved by composing eigen-mode components.

提出一种采用特征模量分解方法对同杆多回线间的零序参数解耦,并给出了同杆双回线零序参数特征模量分解矩阵,通过特征模量分解得到同杆双回线路两端之间的零序电量关系。

Disclosed is a leaky-wave dual polarized slot type antenna, including: first and second feeding circuit sections comprised of N-first strip lines and N-second strip lines with a loop every first period along the X-axis on the first dielectric layer and a second period along the Y-axis, in which the N-first strip lines and the N-second strip lines are parallel to each other being alternate, and each length of Ls1 and Ls2 for the first period satisfies the equation of , first and second multi-channel dividers formed at once and the other sides of the first dielectric layer, to connect the N-first strip lines and the N-second strip lines parallel with each other; and first and second central ports formed in the opposite direction of the cavity, each of the feeding circuit sections being connected to the first and second multi-channel dividers; and first and second slot sections being formed by patterning the second shielding layer, in which M-first and M-second slots are arrayed along the direction of the X-axis and each of the first and second slots forms N-row first and N-row second slot arrays, respectively, which cross the first and second strip lines for each, the first slot and the second slot being orthogonal to each other.

公开了一种漏泄波双偏振槽型天线,包括:第一和第二馈电回路部分,其具有沿着X轴在第一介电层每第一周期以及沿着Y轴的第二周期形成具有环路的N第一带状线和N第二带状线,其中N第一带状线和N第二带状线彼此平行并交替,并且对第一周期的各Ls1和Ls2的长度满足等式,第一和第二多通道分配器寻形成在第一介电层的一侧和另外一侧上,以连接彼此平行的N第一带状线和N第二带状线;以及形成在腔的相对方向中的第一和第二中心端口,每个馈电回路部分连接到第一和第二多通道分配器;以及第一和第二槽部分,所述第一和第二槽部分通过对第二屏蔽层形成模式而形成,其中M第一和M第二槽沿着X轴的方向安置,各第一和第二槽分别形成N行第一和N行第二槽阵列,其对每个横过第一和第二带状线,第一槽和第二槽彼此正交。

Pan-Pioneer offer full line of drawing machine with annealer and variety of takeup / payoff stand to our customers , such as auto-change dual spooler, static down coiler , etc.

民锋公司提供全系列伸线机,并配合和种不同的给线/捲取系列给客户以满足需要,如自动双盘收线机,立式落线架等。

Pan-Pioneer offer full line of drawing machine with annealer and variety of takeup / payoff stand to our customers, such as auto-change dual spooler, static down coiler , etc.

民锋公司提供全系列伸线机,并配合和种不同的给线/卷取系列给客户以满足需要,如自动双盘收线机,立式落线架等。

The results showed that: at metaphase I, the homoeologous chromosome pairing among different F1 hybrids ranged from 2.0 to 11.4 bi-valents formed by homoeologous chromosomes per pollen mother cell, and very few multivalents, and even very few bivalents were formed by two chromosomes within one genome rather than homoeologous chromosomes in some PMCs; at anaphase I, all biva-lents were disjoined and most univalents were divided.

结果表明在中期I阶段,这些杂种一代的近缘染色体联会变化很大,每个花粉母细胞中二价体形成的数目从平均2个到11.4个不等,甚至在某些花粉母细胞中,还发现极少的多价体和非部分同源染色体所形成的单基因组内二价体;在后期I时,所有的二价体分离,同时多数单价体也分离,分离的二价体和分离的单价体都移向两极,从而形成两组染色体;因为这时完整花粉母细胞中分离的二价体在两组染色体中总是对应出现,从而根据半二价体上染色体重组的位置可以分析在二价体的四分体时期发生在非姊妹染色体之间的多种染色体交换类型,如单交换、三线双交换、四线双交换、四线三交换和四线多交换。

Professional design and manufacture of various types of transmission line, belt line, differential chain plate chain conveyor line line, two-row table belt line and other products businesses.

专业设计制造各种类型输送线,皮带线,差速链生产线板链式输送线,双排工作台皮带线等产品的企业。

In this paper, the basic principle of the conventional slip energy recovery induction motor drive is discussed. Two kinds of slip energy recovery induction motor driving systems with high factors are discussed, and the performance analysis of these methods is compared. On the basis of above, a new type of three-phase and four-line slip energy recovering drive is proposed.

本文首先从普通串调原理入手,简要分析了影响串调系统功率因数的主要因素;在对三相四线双晶闸管串级调速、新型GTO串级调速等几种高功率方案进行分析与比较的基础上,提出了一种新型三相四线制双IGBT串级调速控制方案。

MAX1999EEI Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

MAX1999EEI引脚说明: 8 - 32位和16 - 32位字包装选择可编程等待状态的选择:2至31个CCLK数字音频接口包括6个串行端口,两个前643时钟发生器,输入数据端口, 3可编程定时器和一个信号路由单元串行端口提供:六双串口数据线,在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟,帧同步的核心秒,和两个数据可以作为任何一个接收器或发射器对左对齐和I2S配对样本的支持下,最多可同时接收或传送24个频道,每使用两个系列的I2S兼容立体声设备配置可编程方向线;港口的TDM通信接口,包括支持128个电话接口的TDM的渠道,如H.100/H.110支持多达12个的TDM流的支持下,每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道;支持接收通道I2S音频数据,左对齐样本对,或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接,6个串行端口,一个输入数据端口,两个精密时钟发生器,3个定时器,10个中断,六旗投入,产出6个旗,20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率,时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征:JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/遥测分比率为背景的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口的软件和硬件多钳各种各样和片上仿真双电压:3.3六/输出,可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装,也可

TDA4864 Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

TDA4864引脚说明: 8 - 32位和16 - 32位字包装选择可编程等待状态的选择:2至31个CCLK数字音频接口包括6个串行端口,两个前643时钟发生器,输入数据端口, 3可编程定时器和一个信号路由单元串行端口提供:六双串口数据线,在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟,帧同步的核心秒,和两个数据可以作为任何一个接收器或发射器对左对齐和I2S样本对支持,最多可同时接收或传送24个频道,每使用两个系列的I2S兼容立体声设备配置可编程方向线;港口的TDM通信接口,包括支持128个电话接口的TDM的渠道,如H.100/H.110支持多达12个的TDM流的支持下,每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道;支持接收通道I2S音频数据,左对齐样本对,或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接,6个串行端口,一个输入数据端口,两个精密时钟发生器,3个定时器,10个中断,六旗投入,产出6个旗,20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率,时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征:JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/分比率背景遥测的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口软件和硬件多钳各种各样和片上仿真双电压:3.3六/输出,可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装,也可

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推荐网络例句

This one mode pays close attention to network credence foundation of the businessman very much.

这一模式非常关注商人的网络信用基础。

Cell morphology of bacterial ghost of Pasteurella multocida was observed by scanning electron microscopy and inactivation ratio was estimated by CFU analysi.

扫描电镜观察多杀性巴氏杆菌细菌幽灵和菌落形成单位评价遗传灭活率。

There is no differences of cell proliferation vitality between labeled and unlabeled NSCs.

双标记神经干细胞的增殖、分化活力与未标记神经干细胞相比无改变。