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Parallel processing characteristic of the Residue Number System is display a high "area × power × delay" performance in VLSI. Modulo adder is one of the basic units in RNS, meanwhile, its performance has decided the performance optimization of the Residue Number System.

余数系统中的并行处理特性在VLSI系统中表现了很好的"面积×功耗×时延"特性,而模加法器作为构建RNS系统的基本单元之一,其性能决定了余数系统的性能优化。

In the earlier work D. Husinga developed a Matlab computer program that traded adders for delays, optimized scaling and used Canonic Sign Digit techniques to reduce hardware requirements for fixedcoefficient FIR filters .

在先前的工作4 Husinga开发了基于Matlab的计算机程序交易加法器的延迟,优化调整和使用法服注册位数技术,以减少硬件要求fixedcoefficient FIR滤波器。

Chapter 6 studies the design of the adder for IEEE standard 754 single precision floating-point number format.

第6章讨论了针对符合IEEE 754标准的单精度浮点数的浮点加法器的设计。

The modulated signals are added up in a summator 120 to form a real signal, which is filtered by a RF filter 122 for attenuating out-of-band noise and spurious interference.

加法器120中将调制的信号相加形成实信号,该信号通过RF滤波器122滤波,以衰减带外噪声和伪干扰。

What I want to find is a working BUDDY ADDER that lets you add ppl to your YM contact list without them knowing!

我想找到一份工作是好友加法器,可让您添加脂肪酶到您的ym的联络人清单,没有他们不知道!

A second set of decimation filters (226, 228) decimates and filters the output of the summers (222, 224) applying a filter function that is matched to a pulse shape of a base band signal present in the IF signal.

利用与IF信号内存在的基带信号的脉冲波形匹配的滤波器函数,第二组抽取滤波器(226,228)抽取并滤波加法器(222,224)的输出。

So thermocouple must he processed by linearization to display figure.

介绍了用理想二极管电路与加法器实现对热电偶线比化器原理设计。

The research results presented in this paper can be used to guide the design and selection of subword-parallel adders.

研究结果可以用于指导子字并行加法器的设计与选择。

Under the guidance of those two mechanisms,this paper implements several different subword-parallel adders and analyzes their performances.

在这两种机制的指导下,实现了多种子字并行加法器,并对它们的性能进行了比较和分析。

The need of fast adders becomes more exigent.

对快速加法器的需求也越来越高。

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