全环
- 与 全环 相关的网络例句 [注:此内容来源于网络,仅供参考]
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With this dedicated base ring, we succeeded in constructing the EAST, which generates the steady, very long wavelength pulsed plasma, and which realizes the operation of double-null, high-beta plasma as well as single-null plasma at full current.
介绍变形及装配等带来的不满足精度要求将带来的后果。在后续的实验中成功验证基准环的设计,获得稳态的、极长的长脉冲等离子体,并实现全电流下的双零高β和单零高等离子体的运行实验。
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Analyzing and simulating the full closed-loop position servo system of CNC machine tools,this paper proves that mechanism velocity feedback can eliminate the oscillation caused by the lack of rigidity of mechanical driving chain,which is applied in the test process and good result are achieved.
通过对数控机床全闭环位置伺服系统的分析和仿真,证明机械速度反馈能有效地消除由于机械传动链刚度不足引起的振荡,并在调试过程中得到应用,收到良好效果。
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The paper designs and develops the direct current drive circuit of SOA to realize the cross phase modulation for dual-loop optical buffer in the lab.
本文设计并研制出了SOA的直流驱动电路,用于实现本实验室中双环全光缓存器中信号光与控制光的交叉相位调制。
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Embryos were explanted and cultured 4 hours after CP administration. On d 10.5, culture was terminated and embryos were examined for yolk sac diameter, head length and crown-rump length and teratogenic effects of CP.
本文应用小鼠全胚胎培养技术,通过妊娠d 8分别ip 5,10,15和20 mg.kg-1环磷酰胺,研究了该药对器官原基形成期胚胎的致畸作用,并对其致畸机理作了初步探索。
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As one of the longest history and largest scale factory in cylinder industry of China, RONGHUA is qualified for designing and manufacturing various kinds of pressure vessels. It has the manufacture license of special equipment issued by general administration of quality supervision, inspection and quarantine of china and ISO9001:2000 certificate.
具有A2级第三类低、中压力容器, B1级钢制无缝气瓶, B2级焊接气瓶, B3级车用压缩天然气气瓶、钢质内胆环向缠绕车用天然气钢瓶,铝合金内胆全缠绕复合气瓶的设计,制造资质。
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The seven other UNESCO-listed gardens - Lingering Garden, Master of Nets Garden, Mountain Villa with Embracing Beauty, Cangling Pavilion, Lion Forest Garden, Garden of Cultivation and the Couple's Retreat - all merit some scenic reflection.
另外7个被联合国教科文组织列为保护项目的花园有:留园、网师园、环秀山庄、沧浪亭、狮子林、怡园和耦园,其价值全反映在其观赏性。
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Objective To investigate the effects of cyclo oxygenase inhibitor aspirin combined with histamine H2 receptor antagonistor cimitidine on protein metabolism in total parenteral nutrition in septic rats.
目的 观察联合使用环氧化酶抑制剂阿斯匹林和组织胺H2受体阻滞剂西米替丁对腹腔感染大鼠全肠外营养时蛋白质分解的调理作用。
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MAX1999EEI Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available
MAX1999EEI引脚说明: 8 - 32位和16 - 32位字包装选择可编程等待状态的选择:2至31个CCLK数字音频接口包括6个串行端口,两个前643时钟发生器,输入数据端口, 3可编程定时器和一个信号路由单元串行端口提供:六双串口数据线,在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟,帧同步的核心秒,和两个数据可以作为任何一个接收器或发射器对左对齐和I2S配对样本的支持下,最多可同时接收或传送24个频道,每使用两个系列的I2S兼容立体声设备配置可编程方向线;港口的TDM通信接口,包括支持128个电话接口的TDM的渠道,如H.100/H.110支持多达12个的TDM流的支持下,每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道;支持接收通道I2S音频数据,左对齐样本对,或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接,6个串行端口,一个输入数据端口,两个精密时钟发生器,3个定时器,10个中断,六旗投入,产出6个旗,20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率,时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征:JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/遥测分比率为背景的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口的软件和硬件多钳各种各样和片上仿真双电压:3.3六/输出,可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装,也可
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TDA4864 Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available
TDA4864引脚说明: 8 - 32位和16 - 32位字包装选择可编程等待状态的选择:2至31个CCLK数字音频接口包括6个串行端口,两个前643时钟发生器,输入数据端口, 3可编程定时器和一个信号路由单元串行端口提供:六双串口数据线,在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟,帧同步的核心秒,和两个数据可以作为任何一个接收器或发射器对左对齐和I2S样本对支持,最多可同时接收或传送24个频道,每使用两个系列的I2S兼容立体声设备配置可编程方向线;港口的TDM通信接口,包括支持128个电话接口的TDM的渠道,如H.100/H.110支持多达12个的TDM流的支持下,每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道;支持接收通道I2S音频数据,左对齐样本对,或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接,6个串行端口,一个输入数据端口,两个精密时钟发生器,3个定时器,10个中断,六旗投入,产出6个旗,20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率,时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征:JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/分比率背景遥测的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口软件和硬件多钳各种各样和片上仿真双电压:3.3六/输出,可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装,也可
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- 推荐网络例句
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I didn't watch TV last night, because it .
昨晚我没有看电视,因为电视机坏了。
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Since this year, in a lot of villages of Beijing, TV of elevator liquid crystal was removed.
今年以来,在北京的很多小区里,电梯液晶电视被撤了下来。
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I'm running my simile to an extreme.
我比喻得过头了。