作为信号的

Abscisic acid was related to the drought-induced proteinprobably as one kind of signal in water deficit.

研究还发现，ABA可能作为水分亏缺的信号参与诱导玉米产生逆境特异性蛋白。

It also has a power supply for the amplifiers and it may have an accelerometer amplifier as an option.

它也有放大器的电源，并且它也许有过载信号器放大器作为选择。

Methods A hydrophone was used as energy converting equipment to collect wave of acoustic pressure in the field of ultrasound.

采用水听器作为换能器，通过采集超声信号在空间声场内一点的声压波形。

But the shift into travel spending, seen as a big-ticket discretionary item, is a sign perhaps of the next stage of the recovery.

但旅游支出作为大额非必需品消费，可谓经济进一步恢复的信号。

A music cassette is chosen as the mother-tape. New and re-used blank tapes are recorded or transcribed as the son-tapes using two different cassette duplicators.

选择一盘原音带作为母带，分别将出厂空白带和使用过的空白带在2台复录机上录制或转录为子带，经计算机声卡采集，磁带音频信号转换为数字音频文件。

The transformation between digital signal and DC voltage was made with D/A converser and high voltage amplifier; varactor s were used for tuning components; the bandpass filter was a combline microstrip line one, its dimension was presented.

采用数模转换器和高压运放实现数字信号与直流电压的转换；以变容二极管作为调谐元件；带通滤波器采用梳状微带线结构，并给出了结构参数。

This paper presents a low-voltage excitation with feedback method. By pre-excitations, the vibration frequency of the sensor can be got to used as the output of the driver. The feedback signal frequency is very close to the real frequency of the sensor, so the wire can reach resonance state quickly.

本文提出一种反馈式低压激振方法，降低拨弦激振电压对传感器进行预激振，将反馈的振动频率信号作为输出，对传感器进行复振，可以在很短时间内使振弦达到共振状态。

The system takes Field Programmable Gate Array as the key device. The CCD driving clock, clock control of data acquisition and video signal process were accomplished by the module design method from top to bottom.

整个系统采用现场可编程门阵列作为核心器件，通过自上而下的模块设计完成了CCD驱动时序、数据采集时序控制和视频信号简单处理。

The method comprises: 1 when GSM module needs to select a network, it firstly decides if there is a 900 MHz frequency range network capable of meeting the communication need; if yes, then selecting the 900 MHz frequency range network as the working network of the dual-mode mobile phone; otherwise, entering the step 2; 2 deciding if there is a 1800 frequency range network; if not, then returning the step 1 to reselect network; if yes, then selecting 1800 frequency range network as the working network of the dual-mode mobile phone.

本发明公开了一种PHS及GSM双模手机中GSM模块择网的方法，涉及无线通信领域，为解决PHS及GSM双模手机不同网络间信号干扰而提出，采用的技术方案为：(1)GSM模块需要择网时，首先判断是否存在满足通信要求的900MHz频段网络，若存在则选择该900MHz频段网络作为所述双模手机的工作网络，否则进入步骤(2)；(2)判断是否存在符合通信要求的1800MHz频段网络，若不存在则返回步骤(1)重新择网；若存在则选择1800MHz频段网络作为该双模手机的工作网络。

TDA4864 Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

TDA4864引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S样本对支持，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/分比率背景遥测的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

The split between the two groups can hardly be papered over.

这两个团体间的分歧难以掩饰。

This approach not only encourages a greater number of responses, but minimizes the likelihood of stale groupthink.

这种做法不仅鼓励了更多的反应，而且减少跟风的可能性。