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The structure has more flexibility and lower cost than the configurative transputer graphic system abroad which uses Crossbar interconnection architecture.

这种互连结构可比国外少数的可重构Transputer图形系统所采用的Crossbar互连结构具有更大的灵活性和更低的成本。

On the basis of these studies, the statistical cross-talk noise model was successfully proposed and built.

通过分析互连几何参数波动对互连寄生参数的影响,得到其近似的函数关系表达式,在此基础上建立了考虑工艺波动的串扰噪声的统计模型。

From 2003, we use decamethylcyclopentasiloxane electron cyclotron resonance plasma to prepare pore-based SiCOH low-k films.

采用新的互连材料来取代目前的Al/SiO_2已成为解决纳电子器件互连问题的主要选择。

Furthermore, the models are employed in the algorithm of circuit reduction to efficiently simulate the complex highspeed systems.

集成度和电路规模的提高使高速集成电路系统中的互连线数目剧增,导致系统中互连线的密度和长度都有所增加。

On the design of algorithms, a novel exact hierarchical delay analysis method for general circuits is proposed; based on the sensitization theorem for sequential circuits, an exact minimizing clocking method is proposed; based on Boolean process, a waveform simulation method considering interconnecting delay for logic circuit and a parallel waveform simulation method are proposed; a new method that transforms bit-level waveform polynomial to word-level polynomial model is proposed; a multiple valued synthesis algorithm based on multiple valued Boolean process and a wire-centered delay synthesis policy are proposed, in which timing planning, floorplanning, wire planning and optimal clock skew in early design are considered; a two-layers channel routing method for minimizing crosstalk under grid mode is proposed; based on the transition numbers theorems for waveform polynomial, a new method for generation of test with noise effects is proposed.

算法设计方面,提出了一种精确的通用电路层次化延时分析方法;基于时序电路的敏化定理提出时序电路最小时钟周期精确确定方法;提出基于Boolean过程论的考虑互连延迟的逻辑电路波形模拟方法,在分析了波形模拟适合并行化基础上,进一步提出一种并行波形模拟算法;提出一种将位级电路波形多项式描述转化成字级多项式描述的新方法;提出一种基于多值Boolean过程的多值电路综合算法以及一种将前期设计定时规划、前期设计的布局规划和线网结构化方法及低偏移的时钟分配等技术相结合的面向互连延时的综合策略;提出一种串绕最小化的网格模式下的双层通道布线方法;从波形多项式描述跳变数的定理出发提出了一种考虑噪声效应的测试生成新方法。

Based on the telegraph equation, the stochastic model for transmission lines isproposed, and the precise integration algorithm is combined with Monte Carlo method toanalyze the transient response of the stochastic model. Jarque-Bera test is made for thenormality of the model\'s output and the worst-case estimation is given.

基于电报方程建立了互连线的随机模型,结合精细积分算法与蒙特卡洛方法分析了该互连线随机模型的瞬态响应,通过对模型输出信号的正态性进行偏度-峰度检验给出了最差情况估计。

Considering the spatial correlations of interconnect process variations, we modelprocess variations as continual stochastic processes with correlation. For decoupleing thespatial correlation, we express them as an expanded form of independent random variablesby Karhunen-Loeve expansion. Then we use stochastic Galerkin method to solve thedecoupled telegraph equation in the presence of process variations.

考虑互连线工艺变化的空间相关性,将互连线工艺变化建模为具有相关性的连续随机过程;提出采用Karhunen-Loeve展开将该随机过程表示为一组独立随机变量的展开式,从而进行解耦;对解耦后得到的工艺变化下的电报方程,应用随机迦辽金方法求解。

All these problems still need to be solved. So, towards the IP Core interface compatibility of SoC Bus standard, this thesis, based on analyzing the interconnection of IP Cores, researches the software capsulation of IP Core Bus interface layer, and implements the IP Core interface layer of embedded system developing platform which is based on layers. In this thesis; the design method, flow, and environment of SoC based on IP demultiplexing is explained. While in order to improve the integration of IP Core on SoC, interconnection rules of IP Core and its standardization are researched.

鉴于此,本文在对IP核互连进行分析的基础上,针对SoC总线标准的IP核接口的兼容问题,研究和设计了IP核总线接口层的软件封装,并将其作为课题组提出的基于层次的嵌入式系统开发平台的IP核接口层予以实现,使上层开发人员可以根据此规范快速开发出基于该开发平台的IP核,也使得遵循该接口规范的IP核在无需了解具体SoC互连信息的前提下即可实现核内传输机制,从而提高了SoC设计的可复用性。

Firstly, this thesis introduces background, concept and characteristics of MANET, and points out security issues and challenge through a security requirement analysis for MANET. Secondly introduces the basic concept, classified methods and the composing of the IDS.Basing on the research of the lineate networks, this thesis proposes a hiberarchy model based zone, and presents a new

在针对有线网络入侵检测技术研究基础上提出了适用于无线Ad Hoc网络的基于域多层入侵检测模型,并在该模型基础上实施一种新的混合入侵检测算法;通过NS-2网络模拟仿真器模拟测试了该算法的可行性与有效性,构建了移动Ad Hoc网络与有线网络的互连模型,并提出了适用于该互连模型中的入侵检测实施方案。

The electrical characteristic of interconnects and packaging structures in modern integrated circuits has very important effect on...

现代集成电路中互连与封装结构的电性能对系统的电特性已产生了至关重要的影响,互连与封装的分析已成为集成电路CAD的必要组成部分。

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