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We study the problem of the prediction of interconnection dimensions for FPGAs, including estimating interconnection length and channel width.

提出了一种新的FPGA互连预测算法,包括互连长度估计算法和通道宽度估计算法。

The generalized hypercube network can be considered as the extension of hypercube.

l引言互连网络[的容错寻径问题,是目前研究互连网络的热点之一。

In this paper, we studied on the following problems related to the interconnecting networks.

然而如果将它们互连在一起时,其整个互连网络的性能如何呢?

In chapter 6, we consider topology design of internetwork, this problem is NP -hard.

合理安排互连网络设备,以满足互连网络对各用户服务的需求。

There is the distinction between internetwork and single network in the congestion control.

互连网络中拥挤控制,拓扑优化,可靠性性能方面的内容 1)互连网络中拥挤控制不同于各独立网络内的拥挤控制。

Internal bus is a computer chip inside the external bus between the processor for use in chip-level interconnection; and system bus is the plug-in PC board and the bus between the system board for the interpolation pieces of board-level interconnection; external bus is between the computer and external equipment bus, microcomputer as a device through the bus and other equipment to carry out information and data exchange, and it is used equipment interoperability level even.

内部总线是微机内部各外围芯片与处理器之间的总线,用于芯片一级的互连;而系统总线是微机中各插件板与系统板之间的总线,用于插件板一级的互连;外部总线则是微机和外部设备之间的总线,微机作为一种设备,通过该总线和其他设备进行信息与数据交换,它用于设备一级的互连。

The major achievements in this thesis:Ⅰ With optical interconnection technique and time division multiplexing applied in clusters, a high-performance optical interconnection star network has been designed.

本文完成的工作:Ⅰ将光互连技术应用于机群系统,结合时分复用技术,采用星型拓扑结构设计了高速光互连网络。

An embodiment of a method may include rejecting an arriving packet at a destination node on a semiconductor chip's ring interconnect, e.g., an unbuffered, synchronous ring interconnect, if all of the destination node's buffers are not available, leaving the rejected packet on the ring interconnect to continue traversing the ring, and accepting the rejected packet upon arrival at the destination node, if a buffer is available.

方法的实施例可包括,如果例如无缓冲、同步环形互连(120)的半导体芯片的环形互连上的目的地节点110(1-n的所有缓冲区均不可用,则在该目的地节点处拒绝到达的分组,将该被拒绝的分组留在环形互连(120)上以继续遍历该环,并且如果有缓冲区可用,则当被拒绝的分组到达目的地节点110(1-n之后接受该分组。

These interconnects includes specific interconnect lines that send arbitration, address, data, and control information.

这些互连包括发送仲裁、地址、数据和控制信息的特定互连线。

The experiment results show that the optical interconnect can work at 100 kHz, and it is feasible to implement optical interconnects in standard CMOS processes.

实验结果表明:该光互连可工作于100KHz,说明了采用标准CMOS工艺来实现光互连是可行的。

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从鲍尔点的形成原理出发,分析对称连杆曲线上鲍尔点的产生条件,提出等边机构的对称连杆曲线上有单鲍尔点和双鲍尔点。

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