查询词典 two-base bit

In this paper we will use the concept of "mutual opposite form" to simultaneously recode two scalars stating at most significant bit to least significant bit, i.e. left-to-right recoding. We propose a new representation with low joint Hamming weight to reduce the number of elliptic curve point additions to achieve decreasing the operation cost.

本文将透过符号交替表示式，针对两纯量从最高有效位元(most significant bit， MSB)编码至最低有效位元(least significant bit， LSB)以同步的方式重新编码，新的表示式具有低结合汉明权重特性，可以减少椭圆曲线点加法运算次数，达到降低运算成本的目的。

The grey scale of the pixels in image is expressed by quantum bit and the relation between two pixels is described by means of the superposition of two quantum bit in this paper.Based on this,the average of linear hermitian operator in this superposition can be used for judging the edge of image and a new method for edge detection of image is so created.The rationality of the method is interpreted by probability theory here.

利用量子比特表示图像像素的灰度，用双量子位叠加态来描述两像素之间的关联，通过线性厄米算符在该量子叠加态中的平均值来判断像素的边缘特征，由此建立了一种新的图像边缘检测方法，并从概率论的角度对该方法的合理性给予解释。

TL084MJ Pinout: 3.3V Operation with 5V Tolerant Buffers ACPI 1.1, PC99/PC2001 Compliant LPC Interface with Clock Run Support Serial IRQ Interface Compatible with Serialized IRQ Support for PCI Systems 15 Direct IRQs Four 8-Bit DMA Channels ACPI SCI Interface nSMI Shadowed write only registers Internal 64K Flash ROM Programmed From Direct Parallel Interface, 8051, or LPC Host 2k-Byte Lockable Boot Block Can be Programmed Without 8051 Intervention Three Power Planes Low Standby Current in Sleep Mode Intelligent Auto Power Management for Super I/O ACPI Embedded Controller Interface Configuration Register Set Compatible with ISA Plug-and-Play Standard (Version 1.0a) High-Performance Embedded 8051 Keyboard and System Controller Provides System Power Management System Watch Dog Timer 8042 Style Host Interface Supports Interrupt and Polling Access 256 Bytes Data RAM On-Chip Memory-Mapped Control Registers Access to RTC and CMOS Registers Up to 16x8 Keyboard Scan Matrix Two 16 Bit Timer/Counters Integrated Full-Duplex Serial Port Interface Eleven 8051 Interrupt Sources Thirty-Two 8-Bit, Host/8051 Mailbox Registers Thirty-six Maskable Hardware Wake-Up Events Fast GATEA20

TL084MJ引脚说明： 3.3V工作电压为5V容错缓冲器的ACPI 1.1，PC99/PC2001符合LPC接口与时钟运行支持-兼容串行接口与串行的IRQ IRQ的支持PCI系统- 15直接的IRQ - 4个8位DMA通道- ACPI的SCI接口- nSMI -阴影只写寄存器内部的64K的Flash ROM -直接从程序并行接口，8051，还是LPC主机-的2K字节可锁定引导块-可在不干预程序8051三力飞机-低待机电流在休眠模式-智能型自动电源管理的超级I / O的ACPI嵌入式控制器接口配置寄存器设置兼容的ISA拆开的播放标准（版本1.0a）高性能嵌入式8051键盘和系统控制器-提供系统电源管理-系统监视狗定时器- 8042型主机接口-支持中断和轮询访问- 256字节数据RAM -片上存储器映射控制寄存器-获取实时时钟和CMOS寄存器-最多16x8矩阵键盘扫描- 2个16位定时器/计数器-综合全双工串行接口- 11个中断源8051 - 32个8位，Host/8051邮箱寄存器- 36个可屏蔽硬件唤醒事件-快速GATEA20

Two Intel 3002 are needed to have the same processing power of just one 4-bit slicer, so Intel 3002 was not a very popular product at the time.

而且当时市面上比较热门的是4-bit slicer，两颗3002才能抵的上一颗4-bit slicer，一样的工作就需要两倍的晶片数量，所以Intel 3002也不是一项热门商品。

This invention relates to a window A/D converter used in digital supply controllers composed of a PMOS difference input pair, a CTAT offset current generation circuit, two loop oscillators and a digital part including two n-bit counters, one n-bit comparator, one n-bit subtracter and an n-bit D trigger, in which.

本发明属集成电路技术领域，具体为一种适用于数字电源控制器的窗口式模数转换器。它由一个PMOS差分输入对、一个CTAT偏置电流产生电路、两个环路振荡器和数字部分组成。数字部分由两个n位计数器、一个n位比较器、一个n位减法器、一个n位D触发器组成。

A register pair is needed because a multiplication of two 32 bit numbers results in a 64 bit result, just like 9*9=81 - two one digit numbers result in a two digit result.

寄存器对必须的因为乘法是两个32位整数结果存在一个64位结果中。例如9*9=81 两个一位数结果在一个两位结果中。

This is a 24-bit/44.1 kHz transcription using high-end analog equipment of a performance by Emani Sankara Sastry of two ragas on the vina, accompanied by Madras A. Kannan on mridangam.

这是一个24-bit/44 1千赫转录使用高端的一项伊马尼揭罗Sastry两个拉格对尼亚的马德拉斯答：坎南陪同mridangam，高性能的模拟设备。

A 9 -Bit square lattice gas model with temperature was introduced. We fulfilled an acoustic driver using Monte Carlo Method. Using this driver to generate plane waves, a standing sound wave was established in a two\|dimensional pipe.

引入带温度的 9- Bit正方形格子气自动机模型，利用MonteCarlo方法模拟声源并激发平面波，在二维谐振腔中建立了声驻波场。

This thesis introduces a self-compensation method for fixed-width multiplier which receives two n-bit inputs and produces an n-bit product.

在本论文中，我们提出一个利用自我补偿方法的固定长度乘法器架构。

Eatures · Compatible with MCS-51 Products · 2K Bytes of Reprogrammable Flash Memory – Endurance: 1,000 Write/Erase Cycles · 2.7V to 6V Operating Range · Fully Static Operation: 0 Hz to 24 MHz · Two-Level Program Memory Lock · 128 x 8-Bit Internal RAM · 15 Programmable I/O Lines · Two 16-Bit Timer/Counters · Six Interrupt Sources · Programmable Serial UART Channel · Direct LED Drive Outputs · On-Chip Analog Comparator · Low Power Idle and Power Down Modes Description The AT89C2051 is a low-voltage, high-performance CMOS 8-bit microcomputer with 2K Bytes of Flash programmable and erasable read only memory.

eatures ·兼容MCS - 51的产品·及2k字节的编程快闪记忆体-耐力： 1 000写/擦除周期·在2.7 V至6 V的操作范围·完全静态的运作： 0 Hz至24兆赫·两个层次的程式记忆体锁· 128 × 8位内部RAM · 15个可编程I / O线·两个16位定时器/计数器· 6中断源·可编程串行UART的频道·直接驱动LED产出·单晶片模拟比较·低功耗的闲置和掉电模式描述该AT89C2051的是一个低电压，高性能的CMOS 8位微机与及2k字节的Flash可编程和可擦除唯读记忆体。

Neither the killing of Mr Zarqawi nor any breakthrough on the political front will stop the insurgency and the fratricidal murders in their tracks.

在对危险的南部地区访问时，他斥责什叶派民兵领导人对中央集权的挑衅行为。

In fact,I've got him on the satellite mobile right now.

实际上 我们已接通卫星可视电话了