查询词典 two or three

How little that which thou denisest me is,Me it sucked first, and now sucks thee,And in this flea our two bloods mingled be;A sin, or shame, or loss of maidenhead,Yet this enjoys before it woo,And pampered swells with one blood made of two,And this, alas, is more than we would do.Oh stay, three lives in one flea spare,Where we almost, nay more than married are.This flea is you and I, and thisOur marriage bed and marriage temple is;Though parents grudge, and you, we are met,Andcloistered in these living walls of jet.Though use make you apt to kill me,Let not to that, self-murder added be,And sacrilege, three sins in killing three.

第一段诗人看见了那只先后叮过两人的跳蚤，便指着它向情人证明两人的鲜血已通过一只先后叮咬了双方的跳蚤溶为一体，而血的交融则意味着生命的交融，诗人因此推断，两人的生命已经在事实上结合在一起了；第二段，诗人发现情人正抬手欲向跳蚤打去，便急忙劝阻，说这样一来，被害的就是三条性命；第三段，对方显然已经下手，掐死了跳蚤，所以诗人戏谑地称对方为"残忍"、"用无辜者的鲜血把自己的指甲染得红紫"。

MAX1999EEI Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

MAX1999EEI引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S配对样本的支持下，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/遥测分比率为背景的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口的软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

TDA4864 Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

TDA4864引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S样本对支持，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/分比率背景遥测的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

The other Chest I found had some Cloaths in it, but of little Value; but by the Circumstances it must have belong'd to the Gunner's Mate; though there was no Powder in it; but about two Pound of fine glaz'd Powder, in three small Flasks, kept, I suppose, for charging their Fowling-Pieces on occasion: Upon the whole, I got very little by this Voyage, that was of any use to me; for as to the Money, I had no manner of occasion for it:'Twas to me as the Dirt under my Feet; and I would have given it all for three or four pair of English Shoes and Stockings, which were Things I greatly wanted, but had not had on my Feet now for many Years: I had indeed gotten two pair of Shoes now, which I took off of the Feet of the two drown'd Men, who I saw in the Wreck; and I found two pair more in one of the Chests, which were very welcome to me; but they were not like our English Shoes, either for Ease, or Service; being rather what we call Pumps, than Shoes: I found in this Seaman's Chest, about fifty Pieces of Eight in Ryals, but no Gold; I suppose this belong'd to a poorer Man than the other, which seem'd to belong to some Officer.

接着，我就上了大船。我第一眼看到的，是两个淹死的人；他们紧紧地抱在一起，躺在前舱的厨房里。看来，船触礁时，海面上狂风暴雨，海浪接连不断地打在船上，船上的人就像被埋在水里一样，实在受不了最后窒息而死。除了那条狗，船上没有任何其他生还的生物。船上所有的货物，也都让海水给浸坏了，只有舱底下几桶酒因海水已退而露在外面，也不知道是葡萄酒还是白兰地。那些酒桶很大，我没法搬动它们。另外，我还看见几只大箱子，可能是水手的私人财物。我搬了两只到我的小船上，也没有来得及检查一下里面究竟装的是什么东西。要是触礁的是船尾，撞碎的是船首，我此行收获就大了。

For example, the irrigation water should reach the end of the rows in two hours out of an eight hour irrigation period or three hours out of a twelve-hour period.

总灌水时间为8小时，灌溉水流应在2小时内到达尾沟；总灌溉时间为12小时，灌溉水流应在3小时内流到尾沟。

Very handy, large capacity EEPROM memory, with two lines or three-wire SPI interface, with 128 byte cache.

非常好用的大容量EEPROM存储器，带2线或3线SPI接口，带128字节高速缓存。

The results of analysis show that the shock detached distance computed by two temperature model or three temperature compare well with the experiment data, and the heat transfer rate is highest for one temperature model with non-catalytic wall, and lowest for equilibrium gas model, and the heat transfer rate for perfect gas model is between the non-catalytic wall and fully catalytic wall .

结果表明：采用两温度非平衡气体模型计算的激波脱体距离更接近实验情况；采用平衡气体模型计算的壁面热流最高，一温度非平衡气体模型完全非催化的壁面热流最低，而完全气体模型的壁面热流在两者之间。

On the other hand, individuals who metabolised caffeine quickly and consumed two to three cups of coffee a day had a 22% reduction in the risk of heart attack compared with those with the same genetic makeup who consumed just one cup or less each day.

另一方面，那些咖啡因代谢较快的人，如果他们每天喝2杯至3杯咖啡，那么他们就会比那些拥有同种基因构成，但每天只喝1杯或更少量咖啡的人，患心脏病的几率少22％。

On the other hand, individuals who metabolised caffeine quickly and consumed two to three cups of coffee a day had a 22% reduction in the risk of heart attack compared with those with the same genetic makeup who consumed just one cup or less each day.

据《新科学家》杂志网站3月7日报道，一项新研究结果显示，在那些因基因构成导致咖啡因代谢较慢的人中，每天喝2杯至3杯咖啡的人较之拥有相同基因构成，但每天只喝1杯或更少量咖啡的人，其心脏病发作的危险增加36％。

This base period is then followed by anaerobic workouts of one, two, or sometimes three per week.

打好基础后，接着需要在一个星期内进行一次或两次，或者有时3次的无氧型体育训练。

Plunder melds and run with this jewel!

掠夺melds和运行与此宝石！

My dream is to be a crazy growing tree and extend at the edge between the city and the forest.

此刻，也许正是在通往天国的路上，我体验着这白色的晕旋。