查询词典 superscalar

Branch instruction has serious effect on the performance of superscalar microprocessor.

转移指令，特别是条件转移指令是影响超标县处理器性能的关键。

Based on a lot of experiment results, a conclusion is drawn: comparing with other factors, the performance of branch handling strategy is the key limits of processor to exploit the instruction level parallelism existed in nonscientific code, cache miss have severe effect on superscalar processor's performance when it runs scientific code. Second, in order to reduce the branch penalty and improve the performance of superscalar processor, a new branch handling strategy—a classification based hierarchical branch handling strategy, CHBHS is proposed. It first expands the traditional processor architecture to support multiple condition code, conditional execution and Mbranch instruction, as a result, compiler can reduce the number of static conditional branch when the code is generated. Then, CHBHS tries to use the best suitable mechanism to deal with different branch base on their different behavior. CHBHS can predict the target address of unconditional branch, subroutine call and conditional branch by buffering their target address in branch target buffer, a newly proposed high efficient return address stack is used to reduce the penalty of subroutine return instruction, a new Counter Register Stack is also proposed to reduce the penalty of loop-closing branch to zero, and dynamic branch predictor is incorporate with branch target buffer to predict the outcome of conditional branch.

基于上述结论，为了尽量消除转移指令对处理器开发指令级并行性能力的影响，进一步提高处理器性能，在详尽分析目前已存在的转移处理策略的特点与局限性的基础上，首次提出了一种新的转移处理策略即基于分类的层次转移处理策略CHBHS(Classification Based Hierarchical Branch Handling Strategy)，它首先通过扩展传统的体系结构，支持多条件码、条件式执行及多分支转移技术，以使编译程序在进行代码生成时可尽量少生成条件转移指令，从而减少静态条件转移指令的数目；其次，基于不同的转移指令的行为不同这一事实，提出了对不同的转移指令采用不同的机制进行处理的思想，即对无条件转移指令和函数调用指令以及条件转移指令的目标地址，采用转移目标缓冲器来预测，对于函数返回指令，采用所提出一种的高效返回地址栈来预测其目标地址，对于大多数循环控制转移指令，采用所提出的Counter Register Stack来将其所可能带来的损失减少为0，对于其他的条件转移指令采用动态预测机制来预测其方向。

Superscalar refers to a clock cycle of a CPU can execute instructions above.

8超标量是指在一个时钟周期内CPU可以执行一条以上的指令。

A compiler for a superscalar machine has to carefully schedule the instructions it generates, and interleave instructions from different computations, to achieve maximum performance.

一个超标量计算机的编译器必须仔细的安排它产生的指令，交错不同计算的指令，以达到最好的性能。

The development of RISC and superscalar techniques offers a new way to cache optimization.

而RISC和超标量等技术的引入为

In the original production of mica only on the basis of can provide you with sericite, vermiculite powder, superfine superscalar, quartz powder, silica powder, such as series of mineral powder and natural sand gravel mechanism, non-metallic minerals such as quartz sand, the company adhere to the "strict management, quality first "The production and management principles, follow the" integrity-based, service-oriented "principle, has been praised many partners, but also for enterprise development has laid a solid foundation.

在原来只能生产云母粉的基础上，可同时为您提供绢云母，蛭石粉，超细超纯，石英粉，硅微粉等系列矿物粉体及天然采砂机制卵石，石英砂等非金属矿产品，公司奉行"严格管理、质量第一"的生产经营方针，遵循"诚信为本、服务至上"的原则，得到了众多合作伙伴的好评，同时也为企业发展打下了牢固的基础。

Speculative execution is a good way to improve the performance of a superscalar processor.In order to analyze the performance of a speculatively executed superscalar processor,an analytical model is proposed.

肖刚前瞻性执行技术是一种提高超标量处理器性能的有效技术，为了分析前瞻性执行的超标量处理器的性能潜力，文中对其建立了一个性能分析模型。

And this has practical significance for superscalar processor performance modeling and research.

对超标量处理器的性能模拟和研究有着实际的意义。

We know that a key difference between superscalar and VLIW lies in the hardware and software complexity respectively.

我们知道，一个关键区别在于超标量和超长指令字中的硬件和软件的复杂性分别。

SimpleScalar is a superscalar processor monitor which is used widely in performance analysis.

SimpleScalar是目前国际上常用的一种超标量处理器的性能模拟器。

Neither the killing of Mr Zarqawi nor any breakthrough on the political front will stop the insurgency and the fratricidal murders in their tracks.

在对危险的南部地区访问时，他斥责什叶派民兵领导人对中央集权的挑衅行为。

In fact,I've got him on the satellite mobile right now.

实际上 我们已接通卫星可视电话了