查询词典 standard clock

Inputs and Outputs Front Panel: Phones: Standard headphone output jack (gold-plated) Video 4: Gold-plated stereo RCA jacks, gold-plated RCA composite video jack and S-video jack Digital Optical 3 Input: Standard Toslink digital input with a plastic protective plug Digital Coax 3 Input: Standard gold-plated coaxial digital jack Back Panel: AM Loop Antenna Input: Two thumb screw connections FM 75-ohm Antenna input: Threaded "F" type connector Tape Input/Output: Stereo RCA jacks Video 3 Input: Stereo RCA jacks, RCA composite video jack and S-video jack Video 2 Input/Output: Stereo RCA jacks, RCA composite video jacks and S-video jacks Video 1 Input/Output: Stereo RCA jacks, RCA composite video jacks and S-video jacks DVD Input: Stereo RCA jacks, RCA composite video jack, and S-video jack CD Input: Stereo RCA jacks Monitor Output: RCA composite video jack and S-video jack Subwoofer Preamp Output: 1 RCA jack Digital Optical 1 Input: Standard Toslink digital input with a plastic protective plug Digital Optical 2 Input: Standard Toslink digital input with a plastic protective plug Digital Coax 1 Input: Standard coaxial digital jack Digital Coax 2 Input: Standard coaxial digital jack Digital Optical Output: Standard Toslink digital output with a plastic protective plug Digital Coax Output: Standard coaxial digital jack Remote Control In/Out Jacks: One mini-jack input and one mini-jack output Speaker Outputs: Binding post outputs for front left, front right, surround left, surround right, and center speakers (posts are not 5-way binding posts, because each post has a plastic collar that prevents used with spade lugs and the posts are too far apart to use dual banana plugs) AC Outlets: One unswitched AC outlet and one switched AC outlet

投入和产出接待小组：电话：标准耳机输出插孔视频4 ：镀金立体声RCA插孔，镀金的RCA复合视频插孔和S - Video插孔数字光学3输入：标准Toslink数字输入与一个塑料保护插头数字同轴3输入：标准镀金同轴数字接口背板：上午环形天线输入：两个拇指螺丝连接调频75欧姆天线输入：线程的& F &型连接器，磁带输入/输出：立体声RCA插孔视频3输入：立体声RCA插孔，插孔的RCA复合视频和S - Video插孔视频2输入/输出：立体声RCA插孔，莲花复合视频插孔和S - Video插孔视频1输入/输出：立体声RCA插孔，插孔的RCA复合视频和S端子接口的DVD输入：立体声RCA插孔，插孔的RCA复合视频和S -视频CD输入端插孔：立体声RCA插孔监视器输出：复合视频的RCA插孔和S - Video插孔低音前置输出： 1的RCA插孔数字光1输入：标准Toslink数字输入与一个塑料保护插头数字光2输入：标准Toslink数字输入与一个塑料保护插头数字同轴输入1 ：标准同轴数字接口数字同轴2输入：同轴数字接口标准数字光输出：标准Toslink数字输出塑料防护插件数字同轴输出：标准同轴数字接口远程控制在/输出插孔：一个迷你插孔输入和1个小型插孔输出扬声器输出：结合后产出的左前方，右前方，左环绕，右环绕和中心发言（职位不是5个具有约束力的方式，因为每个职位有一个塑料环，可以防止使用铁锹派和职位过于遥远使用双香蕉插头）交流插座：一个unswitched AC插座和一个开关AC电源插座

Metering application for review of assessment standards: measurement standard assessment the original of the application; standard measurement of the original assessment certificate; evaluation standard measurement certificate is valid within the standard set measurement device and the main equipment of a copy of the certificate; returns to replace the standard measurement; measurement Standard in the near future to carry out verification / calibration of the original records and test / calibration copy of the certificate; stability of the measurement standard evaluation copy of the record; measurement standard measurement repeatability evaluation copy of the record; measurement standards in the two-cycle test run between the inspection or verification Test copies of the records.

申请计量标准复查考核：计量标准考核申请书原件；计量标准考核证书原件；计量标准考核证书有效期内标准器及主要配套计量设备的检定证书复印件；计量标准更换申报表；计量标准近期开展检定/校准的原始记录和检定/校准证书复印件；计量标准稳定性考核记录复印件；计量标准测量重复性考核记录复印件；计量标准器在两周期检定之间进行运行检查或验证比对试验记录复印件。4。

MAX1999EEI Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

MAX1999EEI引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S配对样本的支持下，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/遥测分比率为背景的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口的软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

TDA4864 Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

TDA4864引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S样本对支持，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/分比率背景遥测的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

The company mainly produces Chinese Standard GB5782, GB5783, GB5785, GB5786; German Standard DIN931, DIN933, A325M; ISO-International Standard ISO4014, ISO4017; ANSI American Standard A307 and A-10 external hexagon head bolts; Chinese Standard GB1228, German Standard DIN6914 and American Standard A325 high strength steel structural hexagon head bolts; GB3632 high strength steel structural torsion bolt; DIN934 hexagon head nut.

公司主要生产国标GB5782、GB5783、GB5785、GB5786，德制DIN931、 DIN933，国际标准ISO4014、 ISO4017，美制A307、A-10、A325M等外六角螺栓；国标GB1228、德制DIN6914、美制A325重型钢结构六角螺栓；GB3632钢结构高强度扭剪型螺栓；DIN934六角螺母。

According to the chicking equipment for volt-monitor need to build up a standard clock,in order to achieve the request that the instrument carry on time accurate checking to the volt-monitor,this text introduced principle of the oscular clock chip PCF8583 with I2C bus,put forward to make use of the DS32KHz to provide the high stable frequency signal for PCF8583, thus carried out the project of the standard clock, and the interface design of PCF8583 with MCS51 is presented.

根据电压监测仪校验装置需要建立一个标准时钟，对电压监测统计仪进行时间精度校正的要求，介绍了I2C总线接口时钟芯片PCF8583的基本原理，提出了利用DS32KHz给PCF8583提供高稳定度频率信号，从而实现了标准时钟的方案，并给出了PCF8583与MCS51单片机接口设计。

Fully Integrated Clock Recovery and Data Retiming Power Dissipation: 260mW with +3.3V Supply Clock Jitter Generation: 5mUIRMS Exceeds ANSI, ITU, and Bellcore SDH/SONET Jitter Specifications Differential Input Range: 50mVP-P to 1.6VP-P Single +3.3V Power Supply PLL Fast Track Mode Available Clock Output Can Be Disabled Input Data Rate: 2.488Gbps or 2.67Gbps Selectable Output Amplitude Tolerates 2000 Consecutive Identical Digits Loss-of-Lock Indicator Differential CML Data and Clock Outputs Operating Temperature Range:-40C to +85C

1第1页，本页显示记录1-5，共5条记录分1页显示完全集成的时钟恢复和数据重定时功耗：+3.3 V电源与时钟抖动产生：5mUIRMS超越美国ANSI，ITU和Bellcore实验室的SDH / SONET抖动规格差分输入范围：50mVP磷260mW至1.6VP - P的单+3.3 V供电锁相环快车道时钟输出模式下可用可以禁用输入数据速率：2.488Gbps或2.67Gbps可选输出振幅2000年连续容忍同位数丢失锁指示灯差分CML数据和时钟输出工作温度范围：-40℃至+85

The black ant leaves the nest to forage foods with rhythm. In the winter, the period from 10:00 am to 4:00 pm is its best time for foraging; In the spring, there are two rush hours for the ant foraging, in the morning from 8 o'clock to 10 o'clock and at afternoon from 16 o'clock to 19 o'clock.

黑蚂蚁出巢摄食时间有一定的规律性，冬季，黑蚂蚁每天摄食的高峰时间为上午10点以后到下午4点以前；春季，黑蚂蚁每天出巢摄食一般有两个高峰时间，即上午8~10时和下午4~7时。

The clock models of computer, including the early Fuzzball clock model and the present-day Unix clock model, are analyzed. On the basis of the analysis, a universal mathematic model for local clock is established.

接着分析了计算机时钟模型，包括早期的模糊球时钟模型和现在的Unix时钟模型，并建立了通用的本地钟数学模型。

It''s one o''clock, it''s two o''clock, it''s three o''clock, it''s four o''clock, it''s five

一点了，两点了，三点了，四点了，五点了，六点了。

Objective To study the effect of chitosan in the prevention of fibrous scar formation in the epidural space after laminectomy.

目的 观察选择性脊神经后根切除术椎板切除后硬膜外几种防瘢痕粘连物质的作用并探讨其机制。

On his way to the lift, he looked back to us or was it me his eyes pointing?

当他要进电梯时，他回头看我们（或者说是我，他的眼光？