查询词典 slave clock

Rock Around The Clock One, two, three o'clock, four o'clock, rock Five, six, seven o'clock, eight o'clock, rock Nine, ten, eleven o'clock, twelve o'clock, rock We're gonna rock around the clock tonight Put your glad rags on and join me, hon We'll have some fun when the clock strikes one We're gonna rock around the clock tonight We're gonna rock, rock, rock,'til broad daylight We're gonna rock, gonna rock, around the clock tonight When the clock strikes two, three and four If the band slows down we'll yell for more We're gonna rock around the clock tonight We're gonna rock, rock, rock,'til broad daylight We're gonna rock, gonna rock, around the clock tonight When the chimes ring five, six and seven We'll be right in seventh heaven We're gonna rock around the clock tonight We're gonna rock, rock, rock,'til broad daylight We're gonna rock, gonna rock, around the clock tonight When it's eight, nine, ten, eleven too I'll be goin' strong and so will you We're gonna rock around the clock tonight We're gonna rock, rock, rock,'til broad daylight We're gonna rock, gonna rock, around the clock tonight When the clock strikes twelve, we'll cool off then Start a rockin' round the clock again We're gonna rock around the clock tonight We're gonna rock, rock, rock,'til broad daylight We're gonna rock, gonna rock, around the clock tonight

罗克 Around 钟一，二，三点钟，四点钟，岩石五，六，七点钟，八点钟，岩石九，十，十一点钟，十二点钟，岩石我们正去向昼夜不停今晚的岩石穿上你的最好的衣服和加入我，亲爱的我们将获得乐趣中的一些当钟用击打我们正去今晚昼夜不停摇动的的时候，我们正去岩石，岩石，岩石，鼻音化符号大白天我们正去向去昼夜不停今晚的岩石的岩石当钟响了二，三和四下，如果乐队让生活松弛些的时候，我们将为我们正去今晚昼夜不停摇动的更多对叫嚷我们是去岩石，岩石，岩石，鼻音化符号大白天我们正去去的岩石向昼夜不停今晚的岩石当排钟正确在第七天堂中按五，我们将是的六和七叫的时候，我们正去向昼夜不停今晚的岩石我们正去岩石，岩石，岩石，鼻音化符号大白天我们正去向去昼夜不停今晚的岩石的岩石当它也是八，九，十，十一的时候，我将强有力地是 goin 和那样你希望我们是去昼夜不停今晚的岩石我们正去岩石，岩石，岩石，鼻音化符号大白天我们正去向去昼夜不停今晚的岩石的岩石当钟给予十二我们将使冷下来的时候，那时再次以开始一 rockin' 昼夜不停我们是去昼夜不停今晚的岩石我们正去岩石，岩石，岩石'，鼻音化符号大白天我们正去向去昼夜不停今晚的岩石的岩石

The invention relates to a method for synchronizing at least one node of a bus system, which is operated with a predeterminable system clock period, whereby a local clock period and a reference clock period are given for the at least one node, and the reference clock period is synchronized with the system clock period. A local clock period, which is synchronized with the system clock period, of the at least one node is produced whereby linking the local clock period with a splitting factor, whereby the splitting factor represents a ratio of the reference clock period to the local clock period. The splitting factor for synchronizing the local clock period with the system clock period is adapted by adding or subtracting a adaptation value.

用于同步至少一个总线用户的方法，所述的总线系统用可预定的系统周期运行，由此为该至少一个用户给定局域时钟脉冲周期和基准时钟脉冲周期并且把局域时钟脉冲周期与系统时钟脉冲周期同步，其中通过把局域时钟脉冲周期与分配系数相关联的方式产生同步到系统时钟脉冲周期的、至少一个用户的局域时钟脉冲周期，其中，分配系数说明基准时钟脉冲周期与局域时钟脉冲周期的比例，其特征在于，通过加或者减一个适配值或者说补偿值，对用于把局域时钟脉冲周期与系统周期同步的分配系数进行匹配。

The invention discloses a MicroTCA system, which comprises an MCH, and a clock card and a plurality of AMC cards connected with the MCH, wherein the clock card includes a clock selection unit for selecting a clock source and outputting, and a phase locking unit for generating a system synchronous clock from the clock source selected by the clock selection unit of the clock card; and the MCH includes a clock drive unit for driving the system synchronous clock generated by the clock card to the plurality of AMC cards connected with the MCH.

本发明公开了一种MicroTCA系统，包括：MCH、与所述MCH连接的时钟卡及多个AMC卡，其中，所述时钟卡包括：时钟选择单元，用于选择时钟源并输出；锁相单元，用于将所述时钟卡的时钟选择单元所选择的时钟源生成系统同步时钟；所述MCH包括：时钟驱动单元，用于将时钟卡所产生的系统同步时钟驱动到与所述MCH相连的多个AMC卡。

At the same time , we discuss the determinism and nondeterminism of formula-clock automata and the closure propertied under Boolean operation of the language which is accepted by formula-clock automata. We also prove the expressive equivalence between the deterministic formula-clock automata and the nondeterministic formula-clock automata. This means that every nondeterministic formula-clock automata can be transformed to a deterministic formula-clock automata which exactly accept the timed language identified by the fomer.We also extend timed words to infiniteness and define the formula-clock Buchi automata and the formula-clock Muller automata. At last, we show its application in formal verification and modeling of real-time system.

然后讨论了公式时钟自动机的确定性和非确定性，公式时钟自动机识别的语言类在并、交、补运算下的封闭性；并证明了确定的公式时钟自动机和非确定的公式时钟自动机表达能力的等价性，这意味这每一个非确定的公式时钟自动机都能转换为一个与之识别相同时间语言的确定的公式时钟自动机；我们将时间字扩展为无穷的，从而定义了公式时钟Buchi自动机与公式时钟Muller自动机；最后给出了用它进行实时系统的形式化验证方面及对实时系统建模的应用。

Morning glories blow little purple bugle at 4 o'clock early morning; flamboyant rosebushes smile about 5 o'clock in the morning; nenuphars wake up from dream at 7 o'clock in the morning; peatapetes phoenicea bloom at 12:00 at noon; marigolds arrive at 3 o'clock in the afternoon; tobacco flowers wake up at 6 o'clock in the dark; moonlight flowers bloom leaves about 7 o'clock; polianthes tuberosas bloom at 8 o'clock in the evening and night-blooming cereuses appear with a smile about 9 o'clock in the evening

凌晨四时，牵牛花吹起了紫色的小喇叭；五点左右，艳丽的蔷薇(qi á ng w ē i)绽开了笑脸；七点，睡莲从梦中醒来；中午十二点左右，午时花开花了；下午三点，万寿菊 j ú欣然怒放；傍晚六点，烟草花在暮色中苏醒；月光花在七点左右舒展开自己的花瓣；夜来香在晚上八点开花；昙花却在九点左右含笑一现

Get back to the study, move the wooden ladder by the floor clock, investigate the clock, inlays the gem in two grooves, stir the indicator of the clock to 4 o'clock, 8 o'clock, 12 o'clock and rotate the clockwork spring separately, the floor clock removes, dimple a passway leading to basement.

回到书房，将木梯移动到落地钟旁边，调查钟，在两个凹槽处嵌上宝石，分别拨动钟的指针至4点、8点、12点且转动发条，落地钟移开，现出一条通往地下室的通道。

MAX1999EEI Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

MAX1999EEI引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S配对样本的支持下，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/遥测分比率为背景的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口的软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

TDA4864 Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

TDA4864引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S样本对支持，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/分比率背景遥测的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

One focus has steel wall clock, aluminum shell wall clock, alarm clock, iron, aluminum extrusion and other metal bell, but also the production of plastic clock, wood clock, leather clock.

其中重点有铁壳挂钟、铝壳挂钟、铁闹钟、铝挤压等金属钟，也有生产塑胶钟、木头钟、皮钟。

Collect and process the time stamp in network drives based on PTP, then synchronize the master and slave clock by using the best master clock algorithm programmed in Java and C language. Allan variance was used to describe properties of the clock.

基于精密时间协议，在网络驱动中对时戳进行采集和处理，采用最佳主时钟算法选取网络主时钟对从时钟进行同步，使用Java语言和C语言混合编程实现软件网络时钟同步，并采用Allan方差公式对时钟性能进行描述。

A carrier gas such as nitrogen is directed through line 20 and valve 22 to connect with line 26 and mix with the gas sample.

如氮气之类的载体通过管线20和阀22引入，与管线26相通，与气体样品混合。

But for the most part, knaves and parasites had the command of his fortune

然而支配他的家产的大多是恶棍和寄生虫。