查询词典 sixteen-bit

Research on cone/bit speed ratio simulation model of tri-cone bit s;2. In this paper, the kinematics simulation model of tri-cone bit s was established according to the roller cone bit geometry and kinematics.

根据钻头几何学和运动学建立起了随钻运动的三牙轮钻头的计算机运动学仿真模型，该仿真模型既表示出了钻头上各牙齿的形状、大小和在钻头上的分布情况，又可真实反映钻头钻进过程中各牙齿的瞬时位置和相互关系。

MAX1999EEI Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

MAX1999EEI引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S配对样本的支持下，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/遥测分比率为背景的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口的软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

TDA4864 Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

TDA4864引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S样本对支持，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/分比率背景遥测的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

All kinds of drill bits and cutting tools, including HSS twist drill bit, masonry drill bit, SDS hammer drill bit, wood drill bit, diamond saw blade, TCT saw blade, fitting of power tools.

3A10 各种钻头和切削工具，包括麻花钻，水泥钻，电锤钻，木工钻，锯片，电动工具配件。

Because of special geometry structure of three-cone bit, the top of formation will form a tri-spine well bottom while drilling with three-cone bit the drill string. It is the tri-spine well bottom that leads to the axial harmonic of vibration when the bit revolves a round and the three concavo-convex heave of bit and formation result in one time (1×rpm),two time (2×rpm), three time (3×rpm) turning table speed.

高岩由于三牙轮钻头的特殊几何结构，钻进过程中在岩层顶部容易形成一个三脊状井底，正是这一三脊状井底，当钻头旋转一周时钻柱轴向三次凸凹变化，由此在轴向产生1倍、2倍和3倍及其更高次倍于转盘转速rpm的谐波振动。

Because of special geometry structure of three-cone bit, the top of formation will form a tri-spine well bottom while drilling with three-cone bit the drill string. It is the tri-spine well bottom that leads to the axial harmonic of vibration when the bit revolves a round and the three concavo-convex heave of bit and formation result in one time (1×rpm),two time (2×rpm), three time (3×rpm) turning table speed.

高岩摘要：由于三牙轮钻头的特殊几何结构，钻进过程中在岩层顶部容易形成一个三脊状井底，正是这一三脊状井底，当钻头旋转一周时钻柱轴向三次凸凹变化，由此在轴向产生1倍、2倍和3倍及其更高次倍于转盘转速rpm的谐波振动。

I can imagine the "floating weeds wind and rain" in memory and the health bit by bit, that the scenes had her heart torn bit by bit, and she Tilei Cross in this cruel memories of floating, And a broken heart.

我能想像到&风雨飘萍&在回忆和健的点点滴滴时，那曾经的一幕幕将她的心一点一点地撕裂，而她就涕泪交加地在这片残酷的回忆中浮沉着，并心碎着。

The work in this thesis is part of a Preliminary Research Projects. Based on the design of 32-bit embedded microprocessor "Longtium R2", designed and implemented the Dual-port Data Cache, which is applied to the "Longtium R2" microprocessor, achieved synchronization snooping, and effectively improved the processors performance. Based on the Dual-port RAM, studied Multi-port Data Cache, proposed a Sixteen-ported Data Cache.

本论文研究内容来自西北工业大学航空微电子中心所承担的某预研课题，以参与的32位嵌入式微处理器"龙腾R2"的设计工作为基础，设计并实现了基于双端口RAM的数据Cache，该Cache应用于"龙腾R2"微处理器，能够实现数据同步侦听，提高多机环境下处理器的性能；并在双端口RAM基础上，对多端口数据Cache进行研究，提出一个16端口数据Cache的实现方案。

This paper presents a design method of an off-line portable scanner, which can be used without computer. We discuss the system based on a synchronous Digital Signal Processor with multicenter, which is used to gather data with high speed. TIs TMS320VC5402 is a sixteen-bit fix processor, and we make it the core of our control system. Because it can not only handle data with high speed but also manipulate the data by abundant arithmetic/logic operations and determine the results of processing which can be output quickly as images.

本文提出了一种能够脱机使用的便携式扫描仪的设计思想，论述了高速多通道同步DSP数据采集系统，以高性能的TMS320VC5402十六位定点DSP为核心，充分利用其强大而高速的数据处理能力对采集的数据进行复杂的运算，并快速以图形方式输出处理结果。

Sixteen-bit Forth systems often use double-length numbers.

十六位元 Forth 系统经常使用双长度数字。

But this is impossible, as long as it is engaging in a market economy, there are risks in any operation.

但是，这是不可能的，只要是搞市场经济，是有风险的任何行动。

We're on the same wavelength.

我们是同道中人。