查询词典 signal clock

Therefore the quality of the clock extracted from the ADAT signal depends on the specific ADAT source.

因此这个 ADAT 信号的时钟质量就取决于外部的 ADAT 信号源。

At the end of the clock cycle it removes the address from the address bus and deasserts the READ signal.

在这个时钟周期结束时，微处理器撤消地址总线上的地址，并撤消读信号。

The error of output signal is caused by clock shaking in the analog-to-digital converter, which can affect the succeeding signal processing.

模数转换器的时钟抖动引起输出信号的误差，该误差会影响后继的数字信号处理。

And the ratio of the number of clock pulse in delay time and the number in signal period is the ratio of delay time and the signal period. It can get the phase difference from the ratio.

鉴相脉宽内的计数结果与原始信号周期内的计数结果的比值，即是鉴相脉宽与被测信号周期脉宽的比值，从而计算出相位差的测量方法。

According to pulse oddment counting principle, a pulse signal counting circuit for differential ring lasers is designed based on XC3S400AN, a kind of FPGA chip with high performance. The structure of the circuit is described in VHDL language and realized through sequence control and synchronization process of high accuracy/frequency clock signal.

根据脉冲零头计数原理，应用高性能的FPGA芯片XC3S400AN，基于VHDL结构描述语言，对高精度高频率时钟信号进行时序控制及同步处理，设计出一种四频差动激光陀螺脉冲信号计数电路，并进行了实验测试。

Reset circuit so that it is in normal power supply and clock time to do so have a signal, all the motherboard does the reset signal is sent to the South, then we look at the reduction and whether it is normal, one can test the related equipment to test the reset point, to see if it has an instant change of the voltage jump, the second is to look at testing the reset card instant flash of light, under normal circumstances, it is the flash, if that does not shine or Always represent abnormal.

复位电路呢，它是在供电和时钟正常的时候呢产生的一个信号，主板上的所有这个复位信号呢，都是由南桥发出来的，那么咱们看这个复位是否正常，一是呢测这个相关设备的这个复位测试点，看它是否有瞬间的电压跳变，二是看测试卡上的复位灯瞬间闪一下的，正常情况下呢，是闪一下，如果说是常亮或不亮都代表不正常。

A memory device includes: a generator system having a number of generators that supply voltage or current to the memory device, a controller that supplies to the generator system a state control signal that commands the generators to be in an active state or a standby state, and a self-refresh oscillator that generates a self-refresh clock signal having a period suitable to refresh memory cells of the memory device.

存储装置包括：具有多个发生器的发生器系统，所述多个发生器被配置来给所述存储装置提供电压或电流；给所述发生器系统提供状态控制信号的控制器，所述状态控制信号命令所述发生器处于激活状态或备用状态；以及自刷新振荡器，该自刷新振荡器生成具有适于刷新所述存储装置的存储单元的周期的自刷新时钟信号。

The APIC's timer is based on the bus clock signal (or the APIC bus signal, in older machines).

APIC定时器是基于总线时钟信号的(或者在更老式的机器上基于APIC总线信号的)。

A design and implementation method of the high speed modulation system, which adopted the new techniques of the FPGA and DAC based communication system,is presented in this paper. The effect of the key techniques of this system, such as the high speed digital signal processing for modulation, high speed based-band signal conversion, wide-band modulation, carrier suppression, high frequency and high precision system clock generation, is analyzed, and the solutions and performance analysis is also given. Finally, a high speed modulation system for space applications is implemented, can be used for high speed data transmission with QPSK, 8PSK, QAM or other kinds of digital modulation.

本论文依据正交调制原理，采用基于FPGA和DAC的设计技术，提出了一种高速、灵活的调制系统的设计方法，重点分析了系统组成的调制编码映射、基带脉冲信号转换、信号滤波、调制、系统时钟产生等关键技术环节的影响，解决了高速调制信号处理、高速数据转换、宽带调制、载波抑制、高频率高精度系统时钟的产生等关键技术问题，完成了一种适用于空间应用的高传输速率、多进制数字调制方式和调制体制灵活的数据传输调制系统的设计与实现，可在硬件设计不变的情况下，实现QPSK、8PSK和16QAM等多种调制方式的高速数据传输，QPSK调制速率达到500Mbps。

Location among them draw function to utilize digital phase locking ring produce the synchronous signal in the location to draw from code array in step, and regard this signal as the clock of the part of the decoder.

其中的位同步提取功能是利用超前滞后型数字锁相环从编码序列中提取出位同步信号，并把该信号作为译码部分的时钟。

Neither the killing of Mr Zarqawi nor any breakthrough on the political front will stop the insurgency and the fratricidal murders in their tracks.

在对危险的南部地区访问时，他斥责什叶派民兵领导人对中央集权的挑衅行为。

In fact,I've got him on the satellite mobile right now.

实际上 我们已接通卫星可视电话了