查询词典 signal clock

To this end, the telecommunications systems receive the clock pulse and an additional piece of information from the received data stream, said piece of information describing the quality of the clock signal.

在此，电信系统接收时钟，并从所接收的数据流中接收说明该时钟信号的品质的附加信息。

On the basis of the old model of ADC input clock jitter and signal, a formula functioned with ADC input clock jitter and ADC output code cumulative probability distribution function was deduced.

在已有的利用ADC采样研究时钟抖动基本模型的基础上，提出了利用ADC的输出码密度测量时钟抖动的修正模型。

The system takes Field Programmable Gate Array as the key device. The CCD driving clock, clock control of data acquisition and video signal process were accomplished by the module design method from top to bottom.

整个系统采用现场可编程门阵列作为核心器件，通过自上而下的模块设计完成了CCD驱动时序、数据采集时序控制和视频信号简单处理。

Clock signal and clock skew become more and more important in the circuit performance.

时钟信号和时钟偏差对电路性能的影响也越来越明显。

TCK Test Clock Output Input This signal provides the clock for the JTAG interface.

MAXQ微控制器的JTAG接口由四条信号线组成，用于测试访问端口控制器的信息输入和输出。

A device for receiving messages like a combination of an alarm clock and an answering machine has a message receiving unit (11), a recording and playback unit (17), a clock (12), and controls an attention signal.

一种用于接收信息的设备，例如闹钟和应答机的组合，具有一信息接收单元(11)，一记录和重放单元(17)，一时钟(12)，并控制注意信号。

In this paper, based on the analysis of the IF GPS signal theoretic model, a digitized GPS signal generator is implemented in Matlab, which can generate the received GPS signal at the digitized IF frequencies, and the noise and receiver clock error are also simulated.

本文在中频GPS信号理论模型分析的基础上，用Matlab实现了一种数字GPS信号生成模型，它能够在数字中频上产生GPS接收信号，其中包含仿真的噪声和接收机时钟误差。

The new system calls can efficiently adjust the time and frequency of clock, and improve the precision of clock output signal. The new time server can satisfy more time requirements.

这些新的系统调用对钟的时间和频率修正更有效，精度更高，这样就提高了时钟服务器的精度，可以为用户提供较高精度的时间源，以便满足各种时间要求。

Small-signal model is suggested to analyze jitter of the clock driver caused by thermal noise.Multi-level quasi-infinite load differential amplifier structure to effectively achieve low clock jitter is proposed.

提出采用小信号模型对时钟驱动电路中由热噪声引起的时钟抖动进行分析，并提出采用多级准无穷负载差分放大器结构以有效地实现低抖动。

Reduce serial converter to shake to net of Sunday run relay character, serial converter arises as far as possible low shaken signal is very important, this can be taken through low shake of exterior and referenced clock low shake compositive clock synthesizer will come true.

在良多情况下，系统参考时钟不仅不克不迭满足这些发抖要求，而且其频率比所要求的低，带外部VCXO或VCSO的时钟发生器能够供给所需的低发抖参考频率。

Neither the killing of Mr Zarqawi nor any breakthrough on the political front will stop the insurgency and the fratricidal murders in their tracks.

在对危险的南部地区访问时，他斥责什叶派民兵领导人对中央集权的挑衅行为。

In fact,I've got him on the satellite mobile right now.

实际上 我们已接通卫星可视电话了