查询词典 serial interface

MAX1999EEI Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

MAX1999EEI引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S配对样本的支持下，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/遥测分比率为背景的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口的软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

TDA4864 Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

TDA4864引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S样本对支持，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/分比率背景遥测的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

Third, you must also have serial-interface print cable, use one of these cable to the printer on a serial port on the computer connects directly to a serial port; in General, the print market there is such a professional serial port print cable, print better, you can also use a parallel port cable into a serial cable, but to be, we recommend you to buy a professional serial cable, after all, home-made serial cable cannot guarantee stable printing performance.

第三，手头还务必具有串行接口打印线缆，只用搁置这样的线缆才能不兵打印机上的串行端口与计算机上的串行端口间接拆开起来；凡是来说，打印阛阓上有这样的副业串行口打印线缆采办，对于打印程度较矮的伴侣来说，也可以不兵一条并口线缆改变不败串口线缆，不过为安妥起见，我们倡导大家最坏去采办一条副业的串口线缆，终究克己的串口线缆无法包管安定的打印本能机能。

TL084MJ Pinout: 3.3V Operation with 5V Tolerant Buffers ACPI 1.1, PC99/PC2001 Compliant LPC Interface with Clock Run Support Serial IRQ Interface Compatible with Serialized IRQ Support for PCI Systems 15 Direct IRQs Four 8-Bit DMA Channels ACPI SCI Interface nSMI Shadowed write only registers Internal 64K Flash ROM Programmed From Direct Parallel Interface, 8051, or LPC Host 2k-Byte Lockable Boot Block Can be Programmed Without 8051 Intervention Three Power Planes Low Standby Current in Sleep Mode Intelligent Auto Power Management for Super I/O ACPI Embedded Controller Interface Configuration Register Set Compatible with ISA Plug-and-Play Standard (Version 1.0a) High-Performance Embedded 8051 Keyboard and System Controller Provides System Power Management System Watch Dog Timer 8042 Style Host Interface Supports Interrupt and Polling Access 256 Bytes Data RAM On-Chip Memory-Mapped Control Registers Access to RTC and CMOS Registers Up to 16x8 Keyboard Scan Matrix Two 16 Bit Timer/Counters Integrated Full-Duplex Serial Port Interface Eleven 8051 Interrupt Sources Thirty-Two 8-Bit, Host/8051 Mailbox Registers Thirty-six Maskable Hardware Wake-Up Events Fast GATEA20

TL084MJ引脚说明： 3.3V工作电压为5V容错缓冲器的ACPI 1.1，PC99/PC2001符合LPC接口与时钟运行支持-兼容串行接口与串行的IRQ IRQ的支持PCI系统- 15直接的IRQ - 4个8位DMA通道- ACPI的SCI接口- nSMI -阴影只写寄存器内部的64K的Flash ROM -直接从程序并行接口，8051，还是LPC主机-的2K字节可锁定引导块-可在不干预程序8051三力飞机-低待机电流在休眠模式-智能型自动电源管理的超级I / O的ACPI嵌入式控制器接口配置寄存器设置兼容的ISA拆开的播放标准（版本1.0a）高性能嵌入式8051键盘和系统控制器-提供系统电源管理-系统监视狗定时器- 8042型主机接口-支持中断和轮询访问- 256字节数据RAM -片上存储器映射控制寄存器-获取实时时钟和CMOS寄存器-最多16x8矩阵键盘扫描- 2个16位定时器/计数器-综合全双工串行接口- 11个中断源8051 - 32个8位，Host/8051邮箱寄存器- 36个可屏蔽硬件唤醒事件-快速GATEA20

Maybe daily to see the printer that you are printing a parallel port or USB interface and the computer is connected to; however, the printer prints in addition to the parallel port or USB interface, you might have a serial port, we must not think that this is just a well-display serial interface, because as soon as the printer of the parallel port or USB interface experience a breakdown in normal use, the serial port can make their own role, help printer to serial communication fashion emergency printing.

或者我们常日见到的打印机，都是堵住打印并口或USB接口与计算机拆开的；不过也有的一些打印机除了具有打印并口或USB接口之外，还不定具有一个串口，我们万万必给以为这个串口不光是个部署而已，因为一旦打印机的并口或USB接口碰到障碍不克不及变态搁置时，该串口不离能阐发自己应有的功用，帮忙打印机以串行通讯的方法来达不败济急打印。

It has a microcontroller peripheral devices are connected to high-speed bus connections within the connection interface and memory card connection interface, the micro-controller memory card interface, high speed bus interface to connect external devices and virtual within the integrated drive electronics interface module, and the virtual integrated drive electronics interface module includes an integrated drive electronics interface to the virtual host and virtual device side, and when the host side of the card reader connected to the memory card storage or read the instructions issued, the command will be sent to Xuni integrated Shi-driven electronic interface module, and in which the instruction to complete, while the memory card of the information on the transmission to achieve high speed Waiwei components provided within the connecting bus transfer rate, and the host will think that reader is integrated drive electronics interface devices, not just within the high-speed peripheral devices connected bus devices.

其具有微控制器分别连接有高速外围元件内连接总线连接接口及存储卡连接接口，而微控制器具有存储卡接口、高速外围元件内连接总线接口及虚拟整合式驱动电子接口模块，且虚拟整合式驱动电子接口模块包括有整合式驱动电子接口的虚拟主控端及虚拟装置端，而当主机端对读卡机所连接的存储卡下达储存或读取的指令时，该指令会传送至虚拟整合式驱动电子接口模块，并在其中将指令完成，而存储卡内的资料于传输时可达到高速外围元件内连接总线所提供的传输速率，且主控端会认为读卡机为整合式驱动电子接口装置，而非单纯的高速外围元件内连接总线装置。

The main factors affecting the soil-structure interface behaviors were found experimentally and theoretically, including: 1 the thickness of the interface that is five to six times the average grain size of the soil; 2 the aeolotropy of interface, which is responsible for anisotropic response of the stress-strain response of the interface; 3 two physical states, including crashing and compression of the soil near the structure surface, which govern the stress-strain response of the interface strongly; 4 two shear deformation components due to sliding and constraint of the structure surface relative to the soil respectively, which forms the deformation of the interface; 5 the volumetric strain due to dilatancy, which is found to be composed of a reversible dilatancy component and an irreversible dilatancy component. 4. A unified constitutive model of the interface, based on new elasto-plasticity damage theory, was developed. It was confirmed to be effective for the conditions considering monotonic and cyclic shearing, coupling effect of shear and volumetric strains, evolution of physical state, micro-structure aeolotropy of the soil and the resulting aeolotropy of the interface as well as the three normal boundary conditions stated above. 5. 2D and 3D finite element formulations of the present model were derived and incorporated into the FEM codes. They were applied to the evaluation of practical engineering problems with different typical interfaces between soil and structure. The new model was shown to be reasonable and effective.

确定了粗粒土与结构接触面厚度约为5～6倍的平均粒径，首次揭示了接触面的细观结构异向性以及由此所引起的宏观剪切异向性，发现了在单调和往返剪切荷载作用下土颗粒破碎和剪切压密两种物态变化机制共同支配着接触面力学性质的变化，通过细观分析证实了接触面的变形可分解为一般同时发生的土与结构交界面上的滑移变形以及结构面位移约束范围之内土体本身的剪切变形两部分，观测到接触面受剪时表现出明显的相对法向位移，并可分解为可逆性和不可逆性两个分量；(4)建立了第一个能够统一地描述单调与往返剪切特性、剪应变与体应变耦合特性、细观结构和宏观剪切异向性以及土颗粒破碎等物态变化特性的土与结构接触面弹塑性损伤本构数学模型，并采用多种法向边界条件复杂加载路径的试验成果验证了新模型的合理性和有效性；(5)提出了新模型的二、三维有限元格式并结合实际边值问题进行了应用计算分析，比较了不同接触面本构模型对计算结果的影响，证实了新模型及其有限元格式不仅能够合理地描述土与结构接触面的主要力学特性，还能够较好地反映土体与结构物在接触面处的滑移、脱开等不连续现象。

The development of Intelligent User Interface is together with the development of Direct Manipulation Interface, Multimedia User Interface, Multimodal User Interface, and Conceptual User Interface. Intelligent User Interface is the carrier of interaction information. Together with Artificial Intelligent, Cognition Sciences and Computer Sciences, study of Intelligent User Interface focus on many specific topics, which include task model, human behavior and user model.

智能人机界面通过将人工智能技术、认知科学、计算机科学等多种科学结合起来，对交互中的任务模型、人类行为、用户模型等交互系统要素进行研究，缩短计算机交互系统和人之间认知距离，创造人和计算机交流的快捷通道。

This paper explains meaning and influencing factors of interface effectiveness and structures estimated index system and model of interface effectiveness, which contributes to change the mechanism of corporations' interface management, to abandon static isolated view of interface manage, to treat more the question of interface management from the course of technological innovation; not only to pay close attention to the whole goals and innovative goal of corporations, but else to pay close attention to interface harmony and balance, thus to create a kind of positive good innovative atmosphere; not only to pay attention to the interface of an innovative project, but to pay attention to the continuity and crossing between innovative projects.

本文阐述了企业创新界面有效性的涵义及影响因素并构建了测度界面有效性的指标体系和模型，有助于改变企业界面管理的机制，摒弃静态、孤立的界面管理观点，更多地从技术创新的过程去看待管理界面的问题；不仅仅关注企业的整体目标和创新目标，更要关注界面的和谐与平衡，从而创造一种积极的、良好的创新气氛；不但重视一个创新项目的界面，更要重视创新项目之间的连续性和交叉性。

Now our main products are: PTX-LCD, TEX-LCD/S, BLUES30NV serial FM exciters, TX serial 1-10KW FM transmitters, TX serial 3-20KW hot plug-in transmitters, AJ1F serial vertical polarization FM antenna, DPA serial panel FM antenna, star-point or bridge style FM multiplexor, digital STL microwave link, professional receivers and any TV related products.

公司主要产品有：PTX-LCD/S，TEX-LCD/S，BLUES系列调频激励器，TX系列1-10KW调频发射机，TX系列3-20KW热插拔数字调频发射机，AJ1F系列各种功率等级的垂直极化调频天线，DPA系列带反射板偶极子调频天线，星型，桥型系列大功率调频多工器，数字STL微波传输系统，专业调频收转机等及所有电视设备产品

Looking to bounce back from defeat against Cesena last weekend, the Calabrian boss will be sticking to his tried and tested 4-3-3, with Lopez and Sedivic joined up front in Giampaolo's absence by either Nanni or Plasmati.

鉴于上周末对切塞纳的比赛中反败为胜，这支南方球队将会更坚持其一贯而有效的4-3-3阵型，洛佩斯和塞德维奇将取代受伤缺席的詹保罗，和纳尼或者帕斯马蒂中的一个搭档锋线。

Meanwhile, their exposure to the more freewheeling ways of the West broadened dramatically.

另外，西方较自由的生活方式对年轻人的影响增大。