查询词典 sample and hold circuit

Pipeline ADC; System level model; Sample and Hold Circuit; MDAC; Digital Correction; Operational Amplifier

流水线结构；系统级模型；采样保持电路； MDAC；数字校正；运算放大器

It mainly enlarges the digital to tallies chip through Amplifier. It holds the sampling digitalpass to convenience transforming for the chip through sample and hold Circuit, thus it can complete the measurment of current digital y.

主要是通过放大电路将采样到的模拟量放大到和芯片相吻合的数字量，通过采样保持电路将采样的数字量保持住以便后面的芯片进行转换，从而完成电流数字量的测量。

ISM64×64-3 works in the same mode as ISM64×64-2, but was added one sample and hold circuit.

ISM64×64-3型电路仍然采用直接注入读出模式，行积分工作，但是增加了一级采样保持电路。

It can complete the measurement of AC/DC voltage.The running process: it enlarges the digital to tallies chip through Amplifier. It holds the sampling digitalpass to convenience transforming for the chip through sample and hold Circuit.

运行过程是：将采样的模拟量通过放大电路放大到和模数转换芯片相适应的量，通过采样保持电路将芯片采样的量保持住后送入模数转换器转换成数字量，再由单片机进行控制计算。

It can complete the measurement of AC/DC voltage. The running process: it enlarges the digital to tallies chip through Amplifier. It holds the sampling digital pass to convenience transforming for the chip through sample and hold Circuit.

运行过程是：将采样的模拟量通过放大电路放大到和模数转换芯片相适应的量，通过采样保持电路将芯片采样的量保持住后送入模数转换器转换成数字量，再由单片机进行控制计算。

A main ADC architecture for low power system is charge redistribution successive approximation register.In this thesis,8bits sar adc is designed. The main research is sample and hold circuit, D/A convert ,digital control logic etc.

目前在低功率系统中主流的类比数位转换器架构为电荷重新分布式的循渐近式逼近法，本设计8bits逐步逼近式类比数位转换器，主要研究了A/D转换器中包含取样保持电路、D/A转换器、数位逻辑控制等设计。

The ADC is pipelined, including a single-input/difference-output sample/hold circuit and nine stage subcircuits. The preceding eight stages are 1.5bits/stage, and the last stage consists of two comparators. Every input sample is converted into 18 bits binary signals, and these binary signals are converted into 10 bits binary signals through digital correction circuit.

模数转换电路采用流水线式的结构，包括具有单端输入/差动输出功能的采样保持电路和九级的子电路，前八级子电路使用1.5位/级的结构，最后一级使用两个比较器实现，每个输入值被转换为18位的二进制代码，通过数字纠正技术最终实现10位的输出，按照前端电路的应用要求，这个模数转换器实现1.33MHz的采样速率。

On the other hand, the more important thing is because the urban housing is a kind of heterogeneity products.

另一方面，更重要的是由于城市住房是一种异质性产品。

Climate histogram is the fall that collects place measure calm value, cent serves as cross axle for a few equal interval, the area that the frequency that the value appears according to place is accumulated and becomes will be determined inside each interval, discharge the graph that rise with post, also be called histogram.

气候直方图是将所收集的降水量测定值，分为几个相等的区间作为横轴，并将各区间内所测定值依所出现的次数累积而成的面积，用柱子排起来的图形，也叫做柱状图。