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parity相关的网络例句

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You then connect the other end to your PC and configure a terminal emulation application to the following com settings: 9600 bps, 8 data bits, no parity, 1 stop bit, and no flow control.

然后,您可以连接的另一端到您的PC和配置终端仿真应用以下的COM设置: 9600点, 8个数据位,无奇偶, 1停止位,无流控制。

An encoding part (101) turbo-encodes data to be transmitted, outputs parity bit data and also outputs systematic bit data that must have a high quality.

编码部件(101)对要发送的数据进行turbo编码,输出奇偶校验位数据,也输出需要高质量的系统位数据。

The parity check matrix and minimum rank distance of them are given.

其中主要研究工作以及取得的研究成果包括: 1。

We will see later that this parity check methodis a simple example of a data link layer protocol.

我们稍候将从一个简单得数据链路层协议中知道奇偶校验的方法。

Second decoder is implemented based on a (1200, 720) irregular parity check matrix.

第二个是基於区块长度为1200之解码器设计。

The construction of IRA codes includes the optimization of degree distribution and the design of parity check matrix.

在AWGN信道下,对给定的噪声方差,采用高斯近似的方法优化度分布并得出优化结果。

A fast implementation of the Progressive Edge-Growth algorithm for constructing low density parity check codes is presented.

提出了一种构造低密度校验码的渐进边生长算法的快速实现方法。

They are defined by sparse parity check matrices, with various construction methods.

LDPC码定义在稀疏校验矩阵上,有许多种构造方法。

Finally, we describe the future developement of Low density parity check codes.

文中对这两种性能优异的编码方法的性能和特点进行了分析,并对低密度校验码今后研究的重点和方向提出了展望。

In this thesis ,we propose a new VLSI architecture for high speed Low Density Parity Check Code decode.

本论文提出一种以快速解码为诉求的LDPC解码流程之超大型积体电路架构设计。

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