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parallel access相关的网络例句

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A memory system having a main memory which is coupled to a plurality of parallel virtual access channels.

一种存储器系统,具有与多个并行虚拟存取通道连接的一主存储器。

In current processors, the translation is done in a TLB, before or in parallel with the first-level cache access.

目前,地址转换是在中央处理器中的转换后备缓冲器内完成的,而这是发生在一级缓存访问之前或之间。

In this paper, a radix-2 FFT's parallel conflict-free data access algorithm which uses 4 memory banks is presented, and the hardware design of address generation unit is provided.

本文提出了一种利用四个存储体的基2FFT并行无冲突的数据访问方法,并设计了地址生成部件的硬件结构。

Main contributions achieved in this layer are as follows:(1) Proposing two kinds of FFT parallel conflict-free data access algorithms.

这部分的研究工作主要包括: 1。

The thesis introduces the communication principle of EPP mode defined by IEEE1284 Standard in detail, and gives the way to access Enhanced Parallel Port.

本文详细阐述了IEEE1284 标准定义的并行接口EPP 模式的通信原理,介绍了访问并行接口的方法。

Prime memory system scheme is designed to reduce memory access conflicts in parallel memory systems.

该方案既不浪费存储空间,且为实现本系统仅需计算"dmodp",而无需计算商。

The functions of the data load/store unit include data address computing/protecting, and parallel data access.

指令撷取解码及资料存取的速度,向来为微处理机效率的瓶颈。

In orthogonal frequency-division multiple access, closely spaced multiple subcarriers are assigned to different users for parallel signal transmission.

在OFDMA系统中,通过为每个用户分配不同的子载波可以实现并行数据传输。

After studying the MAC protocol of Ad hoc network and by modifying the Wireless Token Ring Protocol, a new uncontested Distributed Parallel Wireless Polling Access Protocol that can provide MAC QoS guarantees for Ad hoc network is presented, and the mathematical model is established by the embedded Markov chain theory and the probability generating function method. Based on it, the mean value of queue length and message waiting time are explicitly obtained.

摘要该文对Ad hoc网络的MAC层协议进行了研究,通过对无线令牌环协议进行改进,提出了一种新的具有QoS保障的无竞争的分布式并行无线轮询访问协议,并采用嵌入Markov链和概率母函数的分析方法,用限定服务规则进行了系统建模,在系统模型的基础上得到了系统的平均排队队长以及平均等待时间的解析结果。

An address counter and Random Access Scan were combined to implement a parallel folding controller.

在硬件上,采用一个地址计数器和随机访问扫描结构相结合实现了并行的折叠控制。

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