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parallel access相关的网络例句

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与 parallel access 相关的网络例句 [注:此内容来源于网络,仅供参考]

In recent years, with the increasing of the processor's frequency and the parallel degrees in processor's instruction executing, the processor's memory access operations expand greatly and bring great pressure to computer systems.

近年来,处理器内核的工作频率及处理器内部指令执行并行度的不断增加,使单位时间内处理器内核的访存频度不断增加,导致处理器对访存效率的要求也越来越高。

And we have given Hadamard matrix in detail in block design, coding and the specific application in communication., Hadamard code as a nonlinear combinatorial code has catered to the need of development of computer technology, stock systematic data and high speed for realizing and reliable access, request the error control code has not only little redundancy, but also can parallel encoding and decoding with high speed.

Hadamard码作为一种非线性组合码,迎合了计算机技术的发展对实现存储系统数据高速且可靠地存取,要求所采用的差错控制码不但冗余度小,还应当能高速并行编码和译码的需要。

TL084MJ Pinout: 3.3V Operation with 5V Tolerant Buffers ACPI 1.1, PC99/PC2001 Compliant LPC Interface with Clock Run Support Serial IRQ Interface Compatible with Serialized IRQ Support for PCI Systems 15 Direct IRQs Four 8-Bit DMA Channels ACPI SCI Interface nSMI Shadowed write only registers Internal 64K Flash ROM Programmed From Direct Parallel Interface, 8051, or LPC Host 2k-Byte Lockable Boot Block Can be Programmed Without 8051 Intervention Three Power Planes Low Standby Current in Sleep Mode Intelligent Auto Power Management for Super I/O ACPI Embedded Controller Interface Configuration Register Set Compatible with ISA Plug-and-Play Standard (Version 1.0a) High-Performance Embedded 8051 Keyboard and System Controller Provides System Power Management System Watch Dog Timer 8042 Style Host Interface Supports Interrupt and Polling Access 256 Bytes Data RAM On-Chip Memory-Mapped Control Registers Access to RTC and CMOS Registers Up to 16x8 Keyboard Scan Matrix Two 16 Bit Timer/Counters Integrated Full-Duplex Serial Port Interface Eleven 8051 Interrupt Sources Thirty-Two 8-Bit, Host/8051 Mailbox Registers Thirty-six Maskable Hardware Wake-Up Events Fast GATEA20

TL084MJ引脚说明: 3.3V工作电压为5V容错缓冲器的ACPI 1.1,PC99/PC2001符合LPC接口与时钟运行支持-兼容串行接口与串行的IRQ IRQ的支持PCI系统- 15直接的IRQ - 4个8位DMA通道- ACPI的SCI接口- nSMI -阴影只写寄存器内部的64K的Flash ROM -直接从程序并行接口,8051,还是LPC主机-的2K字节可锁定引导块-可在不干预程序8051三力飞机-低待机电流在休眠模式-智能型自动电源管理的超级I / O的ACPI嵌入式控制器接口配置寄存器设置兼容的ISA拆开的播放标准(版本1.0a)高性能嵌入式8051键盘和系统控制器-提供系统电源管理-系统监视狗定时器- 8042型主机接口-支持中断和轮询访问- 256字节数据RAM -片上存储器映射控制寄存器-获取实时时钟和CMOS寄存器-最多16x8矩阵键盘扫描- 2个16位定时器/计数器-综合全双工串行接口- 11个中断源8051 - 32个8位,Host/8051邮箱寄存器- 36个可屏蔽硬件唤醒事件-快速GATEA20

The experiment indicated that this framework would enhance the efficiency of data access and the parallel processing ability.

实验说明,这种模型可以提高数据存取的效率和并行处理能力。

In the system, a user can access a parallel file in the mode of independent and sharing.

在此系统中,不仅在各个方面上极力为并行存取开发条件,实现并行存取,而且也极力使用内存作为文件数据的存储场所,在每个环节上都提高性能。

Based on this, a multiuser water-filling method for parallel multiple access channel is presented.

并进一步利用该方法,提出了一种适用于平行多接入信道的多用户注水法则。

The data access algorithm is very important for the processor design, but there is no way to get effective parallel data access until now.

数据的访问方法是专用FFT处理器设计中的重要问题,它对运算速度有非常大的影响,但已知的算法难以实现有效的并行访问。

Figure 5-16 of the two control valve in parallel to achieve for access by the valve.

图5-16中的两个调速阀并联,由换向阀实现换接。

Several problems are resolved in the system, such as the data access in the memory, parallel file access from disk, and the replacement of file data.

解决了并行文件访问的难点:内存中数据的读写,并行化磁盘读写和文件数据的替换,性能测试表明在多用户并行处理的环境中,Parfsnow++有效地提高了系统性能,特别是在文件数据的共享,文件数据的替换,以及使用大容量的统一内存对文件数据的存取等方面。

We also analyze the thrashing phenomenon due to false sharing in various array access patterns and coexisting phenomenon of thrashings due to true or false sharing of data, introduce a concept of access intervals for parallel loops, propose a method called blocking and staggering to eliminate the false sharing thrashing at compile-time.

我们又分析了多级存储并行处理系统中各种访问模式下的假共享cache行抖动现象和真假共享抖动并存现象,引入了并行循环访问距概念,提出了消除假共享抖动的编译方法——块化错位方法。

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