查询词典 packages

"In the past, nearly all our customers used to ask us to disguise the labeling on our packages so they looked like they were cosmetics or something, but now we get much fewer of those type of requests," Norie Oda, operator of the Happy Woman adult aid shop, tells Shukan Post.

"快乐成年女人助性商店"Norie Oda告诉Shukan邮报：过去几乎所有的客户都会要求我们给助性器的外包装做一下掩饰，让它们看起来更象化妆品等东西，但现在这样的请求微乎其微。

In this paper, the bump patterns for flip-chip packages are discussed first, then an experiment is setup to study the dispensing phenomena for different bump patterns, and the CAE software is used to analyze and identify with experiment mutually. From these thorough comparisons and analytical analysis, the existence of channel could slow down the flow, the high density of bump could speed up the flow, and it could avoid the air trap by modified the bump and channel's arrangement on flip-chip package. Then flows in rectangular microchannels driven by capillary force and gravity are discussed; furthermore, the theoretical model of flow in microchannel driven by capillary force and gravity is formulated from the Navier-Stokes equations.

本文首先针对覆晶底部充填进行相关理论推导、实验与模拟，探讨不同凸块配置模型所造成的波前不平滑现象对底部充填流动的影响；即依据相关参数建立模型进行底部充填实验，同时以CAE(Computer-Aided Engineering)模流分析软体进行模拟，在完成理论探讨、实验与模拟分析之后，交叉比较理论、实验与模拟分析结果，归纳出影响底胶充填流动之因素，由结果显示在凸块密集度较高的区域，凸块可以帮助流动，但是在凸块区后方的沟槽区域则因为凸块区所提供之流量不足，所以会造成波前落后的现象，另外藉由修改凸块与沟槽配置的关系，可以有效的控制波前形状的变化情形，避免产生包风现象。

Now until April 15, 2010, China Southern Airlines Company Limited (China Southern Airlines Company Limited, referred to as "Southern"), jointly organized a joint Zhangjiajie Tourism Bureau,"Crystal scene Zhangjiajie" big lottery air travel, passengers log on China Southern portal site www.csair.com participation, there will be a chance to win Zhangjiajie travel packages, tour Zhangjiajie Qifeng Silk.

即日起至2010年4月15日，中国南方航空股份有限公司（China Southern Airlines Company Limited，简称"南航"）联合张家界旅游局共同举办"晶彩纷呈张家界"特大航空旅游抽奖活动，旅客登录南航门户网站www.csair.com参与活动，将有机会赢取张家界旅游套票，畅游张家界的奇峰秀水。

You can use it for publishing test versions or alternative packages, or simply to sort the programs you have created.

你可以将它用于发布测试版本或备用包，或是简单地排序你已经创建的程序。

With this machine such sheets as PVC、PE、PET、HIPS, high-filling mealie farina degradation materials can be made into exquisite packages or food can products in different appearances by plastic absorbing , enabling the packages or products compliant with international standards.

本机可将PVC、PE、PET、HIPS、高填充玉米淀粉降解等片材吸塑成型各种不同形状精美的包装或食品容器、令包装物品或容器更加符合国际规定的各种标准。

MAX1999EEI Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

MAX1999EEI引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S配对样本的支持下，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/遥测分比率为背景的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口的软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

TDA4864 Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

TDA4864引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S样本对支持，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/分比率背景遥测的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

Packages should be placed on their side in the direction of the steam flow, endeavouring to ensure that all the packages are leaning or lying in the same direction to ensure free passage of the sterilant.

因此器械包装的摆放应该根据蒸气的气流方向放置，尽力地保证所有的包装躺或靠着相同的方向，以便灭菌因子能无阻碍地穿透包装。

The square, lightweight and durable packages are ideal for creating an efficient and economical distribution – from the manufacture of compact empty cartons to the distribution and handling of filled packages all the way to the consumer's waste recycle bin.

广场上，轻盈和持久的封装非常适合建立一个高效和经济的分配-从制造紧凑空箱的分布和处理所有填补包的方式提供给消费者的废物回收站。

Xtra Packages for Enterprise Linux is a volunteer-basedcommunity effort from the Fedora project to create a repository ofhigh-quality add-on packages that complement the Fedora-based Red HatEnterprise Linux and its compatible spinoffs such as CentOS orScientific Linux.

PEL是由一个志愿者组成的社区，为完全基于fedora的RHEL（以及兼容的CentOS和其他用于科研用途的Linux）打造高质量软件包的软件仓库。

However, as the name（read－only memory）implies, CD disks cannot be written onorchanged in any way.

然而，正如其名字所指出的那样，CD盘不能写，也不能用任何方式改变其内容。

Galvanizes steel pallet is mainly export which suits standard packing of European Union, the North America. galvanizes steel pallet is suitable to heavy rack. Pallet surface can design plate type, corrugated and the gap form, satisfies the different requirements.

镀锌钢托盘多用于出口，替代木托盘，免薰蒸，符合欧盟、北美各国对出口货物包装材料的法令要求；喷涂钢托盘适用于重载上货架之用，托盘表面根据需要制作成平板状、波纹状及间隔形式，满足不同的使用要求。