查询词典 minimizing sequence

For each type of testing, a necessary and sufficient condition is defined, under which a test sequence of an FSM is synchronizable. In this paper a new model—synchroniable digraph is proposed, which can judge whether there exist any synchronizable test sequence for a given specification without synchronization operation, and which can transform its nonsynchronizable test sequence to synchronizable test sequence if the answer is true. A method to judge how to add external synchronization operations in a nonsynchronizable test sequence to change it to synchroniable one is also proposed.

提出了一种新的同步测试序列生成模型——同步有向图，它可以判断一个给定的协议规格是否可以在不需要外部同步操作的情况下，产生同步测试序列；如果可以产生，则此生成模型可以将非同步测试序列转化为相应的同步测试序列；另外此生成模型还可以用来选择为测试系统增加外部同步通道的方法。

Study and Application on The Index Weighting Method of Minimizing Deviations;2. This paper puts forward an index weighting method of minimizing deviations in multi-attribute decision-making.

提出了一种用于多属性决策中的最小偏差指标赋权方法，该方法将主观和客观两类权重信息相结合，既充分利用了客观信息，又尽可能地满足了决策者的主观意愿。

The design method aims at minimizing aliasing in the subband signals as well as minimizing resisual aliasing, system distortions in the reconstructed output signal.

讨论过采样系统的子带混叠、系统输出中的混叠和系统失真，推导并给出了一个相对简单的非线性优化算法。

As the model is a mathematical model of multi-objective optimization on minimizing volume and minimizing tooth width , the method that a multi-objective model transformed into a single-objective model is introduced.

论文阐述了通过最优水平截集法实现模糊优化模型向常规优化模型转化的方法，由于该模型是一个以体积最小和齿宽最小为优的多目标优化设计模型，论文详细讨论了多目标优化模型向单目标优化模型转化。

On the design of algorithms, a novel exact hierarchical delay analysis method for general circuits is proposed; based on the sensitization theorem for sequential circuits, an exact minimizing clocking method is proposed; based on Boolean process, a waveform simulation method considering interconnecting delay for logic circuit and a parallel waveform simulation method are proposed; a new method that transforms bit-level waveform polynomial to word-level polynomial model is proposed; a multiple valued synthesis algorithm based on multiple valued Boolean process and a wire-centered delay synthesis policy are proposed, in which timing planning, floorplanning, wire planning and optimal clock skew in early design are considered; a two-layers channel routing method for minimizing crosstalk under grid mode is proposed; based on the transition numbers theorems for waveform polynomial, a new method for generation of test with noise effects is proposed.

算法设计方面，提出了一种精确的通用电路层次化延时分析方法；基于时序电路的敏化定理提出时序电路最小时钟周期精确确定方法；提出基于Boolean过程论的考虑互连延迟的逻辑电路波形模拟方法，在分析了波形模拟适合并行化基础上，进一步提出一种并行波形模拟算法；提出一种将位级电路波形多项式描述转化成字级多项式描述的新方法；提出一种基于多值Boolean过程的多值电路综合算法以及一种将前期设计定时规划、前期设计的布局规划和线网结构化方法及低偏移的时钟分配等技术相结合的面向互连延时的综合策略；提出一种串绕最小化的网格模式下的双层通道布线方法；从波形多项式描述跳变数的定理出发提出了一种考虑噪声效应的测试生成新方法。

The aim of the contour optimization is at minimizing and uniforming the tangential electric field as well as minimizing the size of the suspension insulator, subjected to design constraints.

悬垂碍子外型之最佳化设计之主要目的在於满足设计限制式之条件下，将碍子表面之切线电场作均匀化与最小化，并且对碍子绝缘尺寸作最小化设计。

The above decoding method uses both the rule of minimizing probablity of codewords and the rule of minimizing probablity of symbols.

该方法的特点是实现了APP译码和逐字译码的结合。

The Ed1 sequence develops ascending and falling cycle in this area; the Ed2 sequence mainly develop the falling cycle; and Ed3 sequence develops ascending and falling cycle; the Ed4 sequence mainly develop the ascending cycle.

其中，Ed1层序在全区呈对称分布；Ed2层序主要发育下降半旋回；Ed3层序旋回对称明显，全区均有分布；Ed4层序在研究区内主要发育上升半旋回。

In this paper ,on one hand ,we establish the weakly asymptotic order of the classical Bernstein interpolation sequence approximate functionin the Wiener space(or 1-fold integrated Wiener space),on the other hand,we discuss the asymptotically order for the average error of Lagrange interpolation sequence, Hermite-Fejer interpolation sequence and Hermite interpolation sequence based on the Chebyshev nodes on the 1-fold integrated Wiener space.

本文一方面确定了经典的Bernstein多项式算子列逼近函数时在Wiener空间(或1-重积分Wiener空间)下的平均误差的弱渐近阶；另一方面确定了基于第一类Chebyshev多项式零点的Lagrange插值算子列、Hermite-Fejer插值算子列和Hermite插值算子列在1-重积分Wiener空间下的平均误差的弱渐近阶。

The examples show that not only two binary complementary sequence pair sets can be used to construct a new binary complementary sequence pair set,but also it can be extended to the design of new binary complementary sequence pair set through several individual ones. This method can extend the existence space of binary complementary sequence pair set.

通过实例表明利用该方法不仅可由两个二元互补序列偶集构造生成新的二元互补序列偶集，并可推广到由多个二元互补序列偶集构造新的二元互补序列偶集的设计中，从而扩展了二元互补序列偶集的存在空间。

We got alerted a couple of times while we were down south that HETs were on the way to bring us back up north because things were going to go hot again, but it was just rumors.

南下的途中我们不只一次得到警告说重型装备运输车将拉着我们重新北上，因为局势正在变得重新紧张起来，但这只是谣传。

It's the one where they find the ghost in the salt mine.

这一集是演他们在盐矿找到鬼