查询词典 left-footed

For starry flouders,then,the left-eyed variety would be selected against,since in a starry flouder the left optic nerve is uppermost.

由于左视觉神经连接右脑，右视觉神经连接左脑，比目鱼在双眼移到同一侧前，两条是神经已经是交叉的了。

A brilliant left-foot strike which left Bizzarri with no chance as he won the game and sunk the Sicilians.

而且他也用自己的努力终结了这场比赛。漂亮的左脚进球让大象从奥林匹克空手而归。

Left-foot braking 左脚刹车 A style of braking made popular in the 1990s following the arrival of hand clutches so that drivers could keep their right foot on the throttle and dedicate their left to braking.

源于手动离合的出现，在上世纪90年代这种类型的制动方式开始流行，这种方式可以使驾驶者保持用右脚控制油门的方式，而腾出左脚进行刹车操作。

Results: Everyone's center of gravity was distributed in A zone while they were in seat. At standing with opening eyes and closing eyes, the center of gravity in A zone were in 429 subjects( 96.4%) and 436 subjects( 98.0%). Most parameters have significant difference in the women and the men, opening eyes and closing eyes, left-foot standing and right-foot standing, different age groups. The stability in closing eyes was better than in opening eyes, right foot standing was better than left foot standing.

男女、睁闭眼和左右脚比较多个指标有显著差异，闭眼双脚站位的稳定性要较睁眼时好，右脚单脚站位的稳定性较左脚好，各年龄段比较，除睁眼双脚站立左侧内外偏移幅度外，其他指标均有显著差异，20～39岁的平衡功能最佳，60岁以后出现衰退。

Results fMRI showed left parietal regions, left frontal middle/ inferior gyrus, bilateral fusiform gyrus, lingual gyrus, occipital regions, supplementary motor area and right cerebellum were activated during the task.

结果fMRI显示两种任务均激活了左侧顶下小叶、额中回、额下回、右侧小脑及双侧梭状回、舌回、枕中回、枕下回、辅助运动区。

Methods: Observe 325 cases that have been operated on by APR due to low-set rectal cancer, 185 cases that have been created praeternaturalis anus through extraperitoneal tunnel and angle of anus and rectum of left lower abdomen was taken as experimental group, while the other 124 cases been created stoma direct from the peritoneum of left lower abdomen as control group.

调查在我院行低位直肠癌腹会阴联合切除术左下腹造口的患者共325例，其中试验组185例采用左下腹经腹膜外隧道、肛直角重建可控性人工肛门术，对照组124例采用左下腹直接经腹膜造口术。

Methods: Observe 325 cases of patients that have been operated on by APR due to low-set rectal cancer in our hospital, take 185 cases of which have been created praeternaturalis anus through extraperitoneal tunnel and angle of anus and rectum of left lower abdomen as experimental group, while the other 124 cases been created stoma direct from the peritoneum of left lower abdomen as control group.

调查在我院行低位直肠癌腹会阴联合切除术左下腹造口的患者共325例，其中试验组185例采用左下腹经腹膜外隧道、肛直角重建可控性人工肛门术，对照组124例采用左下腹直接经腹膜造口术。

The days that had passed were blown away by the freeze, they are like mase and vaporised by the sun newly-born ,but what is left for me ,when did i left some signs that are gentle as silk

过去的日子如轻烟却被微风吹散了，如薄雾，被初阳蒸融了；我留着些什么痕迹呢？我何曾留着象游丝样的痕迹呢？

MAX1999EEI Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

MAX1999EEI引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S配对样本的支持下，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/遥测分比率为背景的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口的软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

TDA4864 Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

TDA4864引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S样本对支持，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/分比率背景遥测的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

Compared the voltage negative feedback wire-feeding speed regulation system supported by current positive feedback with the rotational speed negative feedback regulation system, the equivalent condition of the two systems is obtained. Then, a wire-feeding speed regulation circuit for the CO_2 welding machine is designed based on TL494 chip, which has the self-protective function under the condition of current overloading.

通过对电压负反馈配合电流正反馈的送丝调速系统与转速负反馈调速系统的比较，得出了这两种调速系统的等效条件，并采用电压负反馈配合电流正反馈技术，设计了一种以TL494为核心的具有过电流截止保护功能的CO_2焊机送丝调速电路。

Make a model to help you determine the optimal number of tollbooths to deploy in a barrier-toll plaza.

建立一个模型来确定在一个容易造成阻塞的收费区中应该设置的收费亭的最优数量。