查询词典 jitter

Due to the complexity of the cell jitter, the NonSynchronous Tining Recovery methods are currently not mature With the emphasis being given to the Class A CBR traffic, this paper analyzes the performance of the queueing delay and cell jitter at the source node and intermediate nodes, and discusses the Source Timing Recovery at the destination node in ATM networks Firstly, this paper presents a description of the cell jitter of CBR traffic, and gives the definitions of two kinds of cell jitter regarding the Source Timing Recovery for CBR traffic Then, by using exact mathematical models and analysis methods, this paper analyzes the impact of the factors, such as the capacity of the queueing buffer, the randomness, the deterministic nature and the correlation in cell arrivals of the background traffic sources, on the queueing delay and cell jitter performance of the CBR traffic through Statistical Multiplexitng To obtain an insight into the power spectral distribution and look for better schemes for the depression and filtering of the cell jitter, within the analyses we succeed deriving the power spectrum of the cell jitter for CBR traffic Hence, not only the power spectral distribution of the cell jitter can in the frequency domain be qualitatively understood, but also can the rms (root-meansquare) value of the cell jitter be quantitatively obtained so as to more accurately measure the amplitude of the jitter In the end-to-end performance analysis of the queueing delay and cell jitter, we propose a kind of quasi-periodic cell stream model to characterize the jittered CBR traffic, and present an initial queueing analysis of the CBR traffic following such a model at a generic intermediate node Additionally, we briefly discuss the buildout/playout and Source Timing Recovery functions of the destination node Finally, regarding the Source Timing Recovery of CBR traffic, this paper systematically discusses several important principles of the cell jitter filtering and depression reported in the literature, introduces several implementation schemes of the Source Timing Recovery e.

由于信元抖动的复杂性，非同步定时恢复方法目前还很不成熟。本文针对A类CBR业务流在ATM网络源节点和中间节点的排队时延和信元抖动性能，以及在目的节点的源定时恢复问题作了较为全面的研究。首先，文中描述了CBR业务流的信元抖动，并具体地给出了两种与CBR业务源定时恢复有关的信元抖动的定义。然后，采用了精确的数学模型和分析方法，有针对性地分析了业务背景中信元到达的纯随机性、确定性和相关性以及排队缓存器容量等因素对CBR业务流经过统计复用后的排队时延和信元抖动性能的影响。为了了解信元抖动的功率频谱分布和寻求更好的抑制和滤除抖动的方法，在性能分析中，我们成功地完成了CBR业务流信元抖动的功率谱分析，使得不但可以从频域定性地认识信元抖动的能量分布特性，而且还可以定量地求出信元抖动的均方根值(rms：root-mean-square)，以更为准确地衡量抖动的大小。在CBR业务流的多节点端-端排队时延和信元抖动性能分析中，我们提出了一种准周期性(quasi-periodic)信元流模型来描述感染了信元抖动的CBR业务流，并基于这一模型进行了CBR业务流中间节点的初步排队分析。

We now have to make some assumptions about the characteristic of the jitter to proceed. One assumption that seems to work is that the jitter amplitude has a Gaussiandistribution. For a jitter waveform that has a Gaussian distribution, there is a point on the Gaussian jitter distribution curve that reflects the RMS value of jitter for Gaussian distribution waveforms, just as with the wave.

一个可行的假定是Jitter幅度具有高斯发布，对于有高斯发布的Jitter波形，高斯Jitter分布曲线上有一点反映了Jitter在高斯分布波形下的RMS值，这点称为"1-sigma值，标准分布"或者"RMS Jitter"值。

With the obtained model of the power spectrum, we have theoretically analyzed the contribution of all the amplitude noise, timing jitter and pulse width jitter to the total noise power spectrum. The simulated results show that while the product of pulse width and angular frequency is larger than 1, the pulse width jitter will contribute an amount of noise to the total noise power.

利用得到的模型，理论分析了激光输出光脉冲各个噪声项对总噪声功率谱的贡献情况，并数值模拟了输出脉冲功率谱，结果表明在脉冲宽度角频率积大于1的情况下，脉冲宽度抖动对总噪声功率谱有很大的贡献。

A simple model of jitter-error audibility has shown that a DAC can tolerate white jitter noise of up to 180ps, but that even lower levels of sinusoidal jitter may be audible.

一个简单的模式抖动误差可听度表明，一个DAC可以承受高达180ps抖动白噪声，但正弦抖动甚至更低的水平可能会听见的。

The jitter mainly includes the jitter caused by transmitting of Line and the jitter occurred by equipments of compound connecter.

抖动、漂移是数字信号中所存在的相位噪声，抖动主要包括线路传输系统引起的抖动和复接器设备引起的抖动。

Then, in order to trade off between the cost and performance of super-fine phase when realizing the low-jitter low-power high-performance frequency synthesizer for Ethernet application, a novel dynamic voltage-mode phase interpolator with 8-stage differential ring VCO has been provided satisfying the requirement of transmitter and receiver simultaneously. The chip has been implemented in SMIC 0.18-um standard CMOS process and achieved an RMS jitter of 11ps with the crystal oscillator reference RMS jitter of 16ps.

接着，在实现以太网低抖动低功耗高性能的频率综合器设计中，为了有效解决超精细相位性能与成本的矛盾，提出一种新颖的动态电压模相位内插电路，与8级环振VCO相配合，为系统同时满足发送与接收需求起到至关重要的作用。

Jitter transfer refers to the portion of jitter allowed to transfer from input to output of the CDR, and jitter generation is that produced by the CDR itself.

抖动转移是指抖动部分允许从输入转移到输出的CDR，并抖动是由自己制作的CDR。

The third, fifth and seventh harmonics were selected to calculate the pulse width jitter, and the corresponding product of pulse width and angular frequency, 7W, were 1.305, 2.175 and 3.045, respectively. With 25 kHz～5 MHz integration limits, the pulse width jitter was obtained to be 3.08ps.

选择脉冲重复频率的三次、五次和七次谐波的功率谱进行分析，三个谐波级次对应的脉冲宽度角频率积Tω分别为1.305，2.175和3.045，在25 kHz～5 MHz偏移频率范围内，得到的脉冲宽度抖动为3.08ps。

Fully Integrated Clock Recovery and Data Retiming Power Dissipation: 260mW with +3.3V Supply Clock Jitter Generation: 5mUIRMS Exceeds ANSI, ITU, and Bellcore SDH/SONET Jitter Specifications Differential Input Range: 50mVP-P to 1.6VP-P Single +3.3V Power Supply PLL Fast Track Mode Available Clock Output Can Be Disabled Input Data Rate: 2.488Gbps or 2.67Gbps Selectable Output Amplitude Tolerates 2000 Consecutive Identical Digits Loss-of-Lock Indicator Differential CML Data and Clock Outputs Operating Temperature Range:-40C to +85C

1第1页，本页显示记录1-5，共5条记录分1页显示完全集成的时钟恢复和数据重定时功耗：+3.3 V电源与时钟抖动产生：5mUIRMS超越美国ANSI，ITU和Bellcore实验室的SDH / SONET抖动规格差分输入范围：50mVP磷260mW至1.6VP - P的单+3.3 V供电锁相环快车道时钟输出模式下可用可以禁用输入数据速率：2.488Gbps或2.67Gbps可选输出振幅2000年连续容忍同位数丢失锁指示灯差分CML数据和时钟输出工作温度范围：-40℃至+85

On the basis of the old model of ADC input clock jitter and signal, a formula functioned with ADC input clock jitter and ADC output code cumulative probability distribution function was deduced.

在已有的利用ADC采样研究时钟抖动基本模型的基础上，提出了利用ADC的输出码密度测量时钟抖动的修正模型。

More direct, directer ; most direct, directest

径直的，笔直的

Do you know how to use a chain saw?

你知道如何使用链锯吗？