查询词典 inverters
- 与 inverters 相关的网络例句 [注:此内容来源于网络,仅供参考]
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A frequency divider, comprises: an inverting unit comprising an input, and an output; and a plurality of switch inverters in series, having at least a first switch inverter and a last switch inverter; each switch inverter comprising two inphase switches, in which the first switch inverter is connected to the output of the inverting unit, and the last switch inverter is connected to the input of the inverting unit; wherein the two inphase switches of each of the switch inverters are respectively supplied by a first voltage and a second voltage, any two of the adjacent switch inverters are respectively controlled by two inverted clocks, thereby the two inphase switches are selectively turned on synchronously and turned off synchronously.
反相单元包含输入端以及输出端;串联的多个切换反相器,具有至少一第一切换反相器以及最终切换反相器,每一切换反相器包含两个同相开关,其中第一切换反相器连接于反相单元的输出端,且最终切换反相器连接于反相单元的输入端;每一切换反相器的同相开关分别由第一电压与第二电压供电,任何两个相邻的切换反相器分别受控于两个反相时钟,因此该两个同相开关是选择性同步开启及同步关闭的。
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A high-speed digital signal driver used in data communication system is composed of a main drive unit containing the CMOS inverters at preceding and final stages and a feedforward and positive feedback unit containing the CMOS inverters at the first and the second stages and the forestage CMOS inverter is said main drive unit.
本发明涉及一种用于数据通信系统的高速数字信号驱动电路,其包括:含有前级CMOS反相器和末级CMOS反相器的主驱动单元,含有第一、第二级CMOS反相器及所述主驱动单元的前级CMOS反相器的前馈和正反馈单元。
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As an example, in the design of a 4-bit ripple carry adder, the second and fourth full adders do not use output inverters for carry generation. one inverter delay is eliminated for every two full adders in the adder chain, and four transistors are reduced. Similarly, in complex designs like the multiplier, the output inverters for generating sum and carry can be used in alternative stages, thereby improving speed and reducing area.
例如,在4位行波进位加法器中,第2级和第4级的加法器不需要用输出反向器进行进位产生,因此,加法器链上的反向器延迟每两级全加器抵消一次,因此可以减少4个晶体管,类似的,在乘法器这样的复杂设计中,用于产生"和"以及"进位"的输出反向器可以用于其它方面,因此可以改善电路的速度和减小面积。
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Digital control and intelligence is the trend of inverters, is the foundation of realizing inverters reliable parallel operation.
逆变电源的全数字化、智能化是发展趋势,是实现逆变电源可靠并联的基础。
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The new compens ator consists of a three-phase voltage source inverters(to eliminat e negative sequence current and adjust reactive power)and a single-phase voltage source inverters(to eliminate zero seq uence current).
该补 偿器由用于补偿负序分量并调整负荷母线电压的三相电压型逆变器和用于补偿零序分量的单相逆变器组成。
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Both the static and dynamic load models are applied in this thesis and the autotransformer starters, static var compensators and VVVF inverters are installed to reduce the current and voltage drop during the motor starting.
文中以暂态稳定度分析模拟大型马达直接启动与加载过程,更考虑使用自耦变压器降压及装置静态虚功补偿器与变压变频启动法来降低启动电流与电压降。
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Two dual-band inverters are proposed, which can be easily merged with adjacent resonators to reduce the circuit size.
另外,我们亦探讨两种适合的倒转器结构,由於可与相邻的谐振器结合,因此整个滤波器结构能够更为紧实。
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In this paper, a general method for modeling the conductive electromagnetic interference sources of pulsewidth modulation inverters is presented based on the principle of the double Fourier integral.
基于双重傅里叶积分方法研究了三相PWM 逆变器传导干扰源的建模方法。
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In this paper, it presents double loop controller with current feed-forward based on Buck DC-AC inverters.
针对Buck DC-AC逆变器,提出一种带电流前馈的双环控制器。
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Also the new method is extended to current-fed inverters and medium frequency power supplies according to the principle of circuit duality.
然后利用电路对偶性原理将这一方法推广到电流型逆变器及中频电源中。
- 推荐网络例句
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Hanna: That's over now, isn't it?
都结束了,对吗
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You must be ill. You look so pale.
你一定是病了,你的脸色苍白。
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After proper differential delay, an UWB monocycle pulse with 84-ps width and the fractional bandwidth of 153% is generated after photodetection.
两个高斯脉冲经过适当的延时,光电检测后产生超宽带单周期脉冲,其脉冲宽度为84ps,相对带宽为153%。