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interpolator相关的网络例句

查询词典 interpolator

与 interpolator 相关的网络例句 [注:此内容来源于网络,仅供参考]

Experimental results show that the proposed interpolator achieves the design specification,exhibiting high performance and hardware efficiency,and also has good noise rejection capability.

测试结果表明,芯片达到了设计指标,节省了芯片面积,并显示出良好的噪声抑制性能。

A mathematical model issetup for the phase interpolator and we perform a precise analysis using this model.

为相位插值器建立了数学模型并基于模型对相位插值器在数学域进行了详细的分析。

There is a Σ-Δ based fractional interpolator to allow program-mable fractional-N division.

它有一个基于允许可编程的N分频校对机部分的Σ-Δ。

The process speed of digital filter was fallen by change sequence of interpolator to realize real time process.

通过改变抽取或内插位置来降低数字滤波器的处理速度,实现信号实时处理。

The result shows that the output amplitude and linearity of phase interpolator is primarily related to the difference between the two input phases.

分析结果表明相位插值器输出时钟的相位和幅度强烈地依赖于插值器输入时钟间的相位差,同时提出一种新的编码方法来补偿相位的非线性。

The interpolator algorithm for cutter's motion locus is an important manufacturing technology problem in CNC machining.

在CNC加工中,刀具运动轨迹的插补算法是一个重要的技术问题。

Finally,a 90nm CMOSphase interpolator,which can work in the frequency from 1GHz to 5GHz,is proposed.

最后利用分析得到的结论,使用90nm CMOS工艺设计并制造了一个相位插值器。

This method is a circular interpolator with the important assumption that the singular modes on adjacent subcarriers approximately change in a linear way.

这是个个圆形内插的方法,且必须陪伴著重要的假设是奇异值在相邻频率间的改变差不多是线性的状态。

The result shows that the output ampli-tude and linearity of phase interpolator is primarily related to the difference between the two input phases.

分析结果表明相位插值器输出时钟的相位和幅度强烈地依赖于插值器输入时钟间的相位差,同时提出一种新的编码方法来补偿相位的非线性。

The power dissipation of the phase interpolator is 1mW with a 1.2V power supply.

它的供电电压为1.2V,功耗为1mW,工作范围从1GHz到5GHz。

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