查询词典 instruction set

The programmable microprocessor manages internal data flow and digital I/Os. The 24-bit DSP is specified as its architecture and instruction set for sound algorithms. The 16-bit reverberator is 3-D virtual sound IP performed in real time.

可程式化微处理控制器负责系统晶片内部的流程处理和周边 I/O 控制；24位元数位讯号处理器因其架构与指令集是特别针对音讯系统的主要演算法做考量；16位元空间回响器则是一个即时3-D 音效处理的智财，这两个处理器分别并连接於高速及周边汇流排上。

The programmable microprocessor manages internal data flow and digital I/Os. The 24-bit DSP is specified as its architecture and instruction set for sound algorithms. The 16-bit reverberator is 3-D virtual sound IP performed in real time. The two processors are connected to the high-performance bus and the peripheral bus, respectively.

可程式化微处理控制器负责系统晶片内部的流程处理和周边I/O控制；24位元数位讯号处理器因其架构与指令集是特别针对音讯系统的主要演算法做考量；16位元空间回响器则是一个即时3-D音效处理的智财，这两个处理器分别并连接於高速及周边汇流排上。

The ADuC812 is a fully integrated 12-bit data acquisition system incorporating a high performance self calibrating multichannel ADC, dual DAC and programmable 8-bit MCU (8051 instruction set compatible) on a single chip.

本文介绍了以AD公司的数据处理芯片ADuC812和CC1100无线传输模块为核心器件的温度控制以及数据无线传输系统。

Loop unrolling is a code-shaping level optimization that is not CPU- or instruction-set-specific

循环展开是一种代码重构级别的优化技术。该技术不依赖与特定的CPU/指令集，而是通过重

We will examine the organization, instruction set, and other emulators of ARM.

我们先介绍ARM处理器的组织架构，指令集。

Pinout: C High-performance 32-bit RISC Architecture C High-density 16-bit Instruction Set C Leader in MIPS/Watt C Little-endian C Embedded ICE (In-circuit Emulation) 8-, 16- and 32-bit Read and Write Support 256K Bytes of On-chip SRAM C 32-bit Data Bus C Single-clock Cycle Access Fully Programmable External Bus Interface C Maximum External Address Space of 64M Bytes C Up to Eight Chip Selects C Software Programmable 8/16-bit External Data Bus Eight-level Priority, Individually Maskable, Vectored Interrupt Controller C Four External Interrupts, including a High-priority, Low-latency Interrupt Request 32 Programmable I/O Lines Three-channel 16-bit Timer/Counter C Three External Clock Inputs C Two Multi-purpose I/O Pins per Channel Two USARTs C Two Dedicated Peripheral Data Controller Channels per USART Programmable Watchdog Timer Advanced Power-saving Features C CPU and Peripheral Can be Deactivated Individually Fully Static Operation: C 0 Hz to 75 MHz Internal Frequency Range at VDDCORE = 1.8V, 85C 2.7V to 3.6V I/O Operating Range 1.65V to 1.95V Core Operating Range -40C to +85C Temperature Range Available in 100-lead TQFP Package

M5L8253P-5引脚说明： C型高性能32位RISC架构C高密度以MIPS /瓦C小端C十六位指令集C领袖嵌入式冰8 - 16 -位和32位的读写支持256K的片上SRAM的 32位数据总线C单时钟周期存取字节完全可编程的外部总线接口C最大的外部地址空间的64M字节多达8个C芯片选择C软件可编程8位外部数据总线8级优先级，独立可屏蔽，向量中断控制器C四外部中断，其中包括一个高优先级，低延迟中断要求32个可编程I / O口线三通道16位定时器/计数器C三个外部时钟输入C两多用途I / O引脚每通道2个通用同步C两专用外设数据控制器通道每个USART可编程看门狗定时器先进的节能特性 CPU和外设可停用独立全静态工作中：C 0 Hz至75 MHz的频率范围内的VDDCORE = 1.8，85℃2.7V到3.6VI / O的操作1.65V到1.95V范围核心工作电压范围在- 40C至+85 C温度范围内使用的100引脚TQFP封装

Opcode A sequence of bits that is recognized by the processor as one of the instructions in its instruction set.

一串被处理器验证过的二进制位的序列，它作为其指令集的一个子集。

Opcode A sequence of bits that is recognized by the processor as one of the instruct ions in its instruction set.

一串被处理器验证过的二进制位的序列，它作为其指令集的一个子集。

Opcode A sequence of bits that is recognized by the processor as one of the instructi ons in its instruction set.

一串被处理器验证过的二进制位的序列，它作为其指令集的一个子集。

Opcode A sequence of bits that is recognized by the processor as one of the instruc tions in its instruction set.

一串被处理器验证过的二进制位的序列，它作为其指令集的一个子集。

Neither the killing of Mr Zarqawi nor any breakthrough on the political front will stop the insurgency and the fratricidal murders in their tracks.

在对危险的南部地区访问时，他斥责什叶派民兵领导人对中央集权的挑衅行为。

In fact,I've got him on the satellite mobile right now.

实际上 我们已接通卫星可视电话了