查询词典 hardware interface

System driving program is the system trust part running on the operation system kernel. And it is the interface between application program and hardware, controlling the data exchange.

软件部分中，系统驱动程序是运行在操作系统内核的系统信任部分，是应用程序与硬件的接口，负责双方的数据交换。

The second section introduces the design of the hardware system, including the design of the sampling audio board and network interface board.

第二部分介绍了硬件系统设计，包括音频采集板和网络接口板的设计。

In order for a computer to communicate directly with the Distributed Control System, this paper explains the structure of the INFI 90 type DCS made by the Baily Control Company in America in detail. By means of analyzing its inner agreement on communication, an interface between the INFI 90 type DCS and the computer is designed, which includes the software and hardware.

为了实现微机直接与集散控制系统间通信，详细分析了美国贝利控制公司研制的INFI－90集散控制系统的结构组成，通过剖析该系统的内部通信协议约定，设计了微机与INFI－90集散系统通信接口，它包括硬件和软件两部分，其中软件由Borland C＋＋语言编程实现。

Http://www-128.ibm.com/developerworks/cn/linux/ 6. Course Objects The operating system provides an established, convenient, and efficient interface between user programs and the bare hardware of the computer on which they run.

Curricula 根据中国计算机科学与技术学科教程 2005(China Computing Curricula 2005)，计算机科学与技术学科知识体系分为知识领域，知识单元和知识点三个层次，共有 14 个独立的知识领域。

Secondly,on the base of designing hardware circuit to implement measuring the signal of angle displacement of motor accurately,a Interface card has been designed.

接着，在设计硬件电路实现精确测量交流伺服电机角位移信号的基础上设计了基于PCI总线规范的接口卡。

If the hardware address in the frame is a broadcast address, or if it matches the network interface, the frame is passed to the appropriate protocol in the layer above.

如果这一帧的硬件地址是广播地址，或者它与本机网络接口层相匹配，此帧就通过这一层送到上一层中适当的协议程序。

This paper introduced the architecture and the related specifications of PSTN based SMS System, especially emphasized CTSI (Chinese Terminal Service Interface) Specifications on Analog Line used in the research and introduced the researches and technologies of software and hardware implementation of iPhone based on PSTN SMS in detail.

并从硬件和软件两个方面较详细地介绍了基于固网短信业务的信息终端开发过程以及相关技术要点。

Research on pen user interface is to make those traditional works computable through study of hardware and software of relative fields.

笔式界面的研究就是要将这些传统的工作可计算化并且保持传统工作方式的自然性。

TDA4864 Pinout: 8- to 32-bit and 16- to 32-bit word packing options Programmable wait state options: 2 to 31 CCLK Digital audio interface includes six serial ports, two pre- cision clock generators, an input data port, three programmable timers and a signal routing unit Serial ports provide: Six dual data line serial ports that operate at up to 50 Mbits/s for a 200 MHz core on each data line each has a clock, frame sync, and two data lines that can be configured as either a receiver or transmitter pair Left-justified sample pair and I2S support, programmable direction for up to 24 simultaneous receive or transmit channels using two I2S compatible stereo devices per serial port TDM support for telecommunications interfaces including 128 TDM channel support for telephony interfaces such as H.100/H.110 Up to 12 TDM stream support, each with 128 channels per frame Companding selection on a per channel basis in TDM mode Input data port provides an additional input path to the DSP core configurable as either eight channels of I2S or serial data or as seven channels plus a single 20-bit wide syn- chronous parallel data acquisition port Supports receive audio channel data in I2S, left-justified sample pair, or right-justified mode Signal routing unit provides configurable and flexible connections between all DAI components, six serial ports, an input data port, two precision clock generators, three timers, 10 interrupts, six flag inputs, six flag outputs, and 20 SRU I/O pins Serial peripheral interface Master or slave serial boot through SPI Full-duplex operation Master-slave mode multimaster support Open drain outputs Programmable baud rates, clock polarities, and phases 3 Muxed Flag/IRQ lines 1 Muxed Flag/Timer expired line ROM based security features: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios JTAG background telemetry for enhanced emulation features IEEE 1149.1 JTAG standard test access port and on-chip emulation Dual voltage: 3.3 V I/O, 1.2 V core Available in 136-ball BGA and 144-lead LQFP packages Lead free packages are also available

TDA4864引脚说明： 8 - 32位和16 - 32位字包装选择可编程等待状态的选择：2至31个CCLK数字音频接口包括6个串行端口，两个前643时钟发生器，输入数据端口， 3可编程定时器和一个信号路由单元串行端口提供：六双串口数据线，在高达50 Mbps的操作/为200兆赫的每个数据行每个人都有一个时钟，帧同步的核心秒，和两个数据可以作为任何一个接收器或发射器对左对齐和I2S样本对支持，最多可同时接收或传送24个频道，每使用两个系列的I2S兼容立体声设备配置可编程方向线；港口的TDM通信接口，包括支持128个电话接口的TDM的渠道，如H.100/H.110支持多达12个的TDM流的支持下，每帧128个频道每个压缩扩展每通道的基础上选择在TDM模式输入数据端口提供了一个额外的输入路径的DSP核心配置为I2S或串行数据或7加一个20位宽的SYN -异步的并行数据采集接口通道或8通道；支持接收通道I2S音频数据，左对齐样本对，或右对齐模式信号路由单元组件之间提供所有戴配置和灵活的连接，6个串行端口，一个输入数据端口，两个精密时钟发生器，3个定时器，10个中断，六旗投入，产出6个旗，20曼谷南南区域股的I / O管脚串行外设接口的硕士或奴隶通过SPI串行启动全双工运作主从模式多主机支持开漏输出可编程波特率，时钟极性和第三期合并调制旗/ IRQ线路1合并调制旗/定时器过期线光盘的防伪特征：JTAG的访问与64位受保护的关键允许内存内存可分配给程序访问控制的限制下对敏感地区有一个代码锁相环/分比率背景遥测的JTAG仿真功能增强的IEEE 1149.1 JTAG标准测试访问端口软件和硬件多钳各种各样和片上仿真双电压：3.3六/输出，可在1.2 V核心136球BGA封装和144引脚LQFP封装无铅封装，也可

MODEM used if the interface is USB port, then plug into USB port on another try, If it is really found that there is a hardware failure, then the suppliers had no choice but to repair or replace the hardware.

如果MODEM用的接口是USB口，则插到另一个USB口上试试，如果发现真的是出现了硬件故障，那么只好到供应商处维修或更换硬件了。

But we don't care about Battlegrounds.

但我们并不在乎沙场中的显露。

Ah! don't mention it, the butcher's shop is a horror.

啊！不用提了。提到肉，真是糟透了。